參數(shù)資料
型號(hào): HCF4017M013TR
廠商: 意法半導(dǎo)體
元件分類: 通用總線功能
英文描述: DECADE COUNTER WITH 10 DECODED OUTPUTS
中文描述: 十年計(jì)數(shù)器10解碼輸出
文件頁數(shù): 6/11頁
文件大?。?/td> 377K
代理商: HCF4017M013TR
HCF4017B
6/11
TYPICAL APPLICATIONS
DIVIDE BY N COUNTER(N < 10) WITH
DECODED OUTPUTS
When the N
th
decoded output is reached (N
th
clock pulse) the S-R flip-flop (constructed from two
NOR gates of the HCF4001B) generates a reset
pulse which clears the HCF4017B to its zero
count. At this time, if the N
th
decoded output is
greater than or equal to 6, the C
OUT
line goes high
to clock the next HCF4017B counter section. The
"0" decoded output also goes high at this time.
Coincidence of the clock low and decoded "0"
output high resets the S-R flip-flop to enable the
HCF4017B. If the N
th
decoded output is less than
6, the COUT line will not go high and, therefore,
cannot be used. In this case "0" decoded output
may be used to perform the clocking function for
the next counter.
TEST CIRCUIT
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= 200K
R
T
= Z
OUT
of pulse generator (typically 50
)
相關(guān)PDF資料
PDF描述
HCF401XXBC1 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS
HCF401XXBEY 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS
HCC401XXBF 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS
HCC40104BC1 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER
HCC40194BC1 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER
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