參數(shù)資料
型號(hào)： HCD66751BP
廠商： Hitachi,Ltd.
英文描述： 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions
中文描述： 128 × 128點(diǎn)圖形LCD控制器/驅(qū)動(dòng)器，四灰度函數(shù)
文件頁(yè)數(shù)： 87/96頁(yè)
文件大小： 2068K
代理商： HCD66751BP
HD66750/1
87
80-system Bus Interface Timing Characteristics
(Vcc = 1.8 to 2.4 V)
Item
Symbol Min
Typ
Max
Unit
Test Condition
Bus cycle time
Write t
CYCW
600
ns
Figure 63
Read t
CYCR
800
ns
Figure 63
Write low-level pulse width
PW
LW
120
ns
Figure 63
Read low-level pulse width
PW
LR
350
ns
Figure 63
Write high-level pulse width
PW
HW
300
ns
Figure 63
Read high-level pulse width
PW
HR
300
ns
Figure 63
Write/Read rise/fall time
t
WRr
,
WRf
25
ns
Figure 63
Setup time (RS to CS*, WR*, RD*)
t
AS
50
ns
Figure 63
Address hold time
t
AH
20
ns
Figure 63
Write data setup time
t
DSW
60
ns
Figure 63
Write data hold time
t
H
20
ns
Figure 63
Read data delay time
t
DDR
300
ns
Figure 63
Read data hold time
t
DHR
5
ns
Figure 63
(Vcc = 2.4 to 3.6 V)
Item
Symbol Min
Typ
Max
Unit
Test Condition
Bus cycle time
Write t
CYCW
380
ns
Figure 63
Read t
CYCR
500
ns
Figure 63
Write low-level pulse width
PW
LW
70
ns
Figure 63
Read low-level pulse width
PW
LR
250
ns
Figure 63
Write high-level pulse width
PW
HW
150
ns
Figure 63
Read high-level pulse width
PW
HR
150
ns
Figure 63
Write/Read rise/fall time
t
WRr, WRf
25
ns
Figure 63
Setup time (RS to CS*, WR*, RD*)
t
AS
50
ns
Figure 63
Address hold time
t
AH
20
ns
Figure 63
Write data setup time
t
DSW
60
ns
Figure 63
Write data hold time
t
H
20
ns
Figure 63
Read data delay time
t
DDR
200
ns
Figure 63
Read data hold time
t
DHR
5
ns
Figure 63
Reset Timing Characteristics (V
CC
= 1.8 to 3.6 V)
Item
Symbol
Min
Typ
Max
Unit
Test Condition
Reset low-level width
t
RES
1
ms
Figure 64
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