參數(shù)資料
型號(hào)： HCD66710A00
廠商： Hitachi,Ltd.
英文描述： (Dot Matrix Liquid Crystal Display Controller/Driver)
中文描述： （點(diǎn)陣式液晶顯示控制器/驅(qū)動(dòng)器）
文件頁(yè)數(shù)： 37/73頁(yè)
文件大小： 507K
代理商： HCD66710A00
HD66710
327
Set DDRAM Address
Set DDRAM address sets the DDRAM address binary AAAAAAA into the address counter while the RE
bit is cleared to 0.
Data is then written to or read from the MPU for DDRAM.
However, when N and NW is 0 (1-line display), AAAAAAA can be 00H to 4FH. When N is 1 and NW is
0 (2-line display), AAAAAAA is (00)H to (27)H for the first line, and (40)H to (67)H for the second line.
When NW is 1 (4-line display), AAAAAAA is (00)H to (13)H for the first line, (20)H to (33)H for the
second line, (40)H to (53)H for the third line, and (60)H to (73)H for the fourth line.
Set SEGRAM Address
Only when the extended register enable bit (RE) is 1, HS2 to HS0 and the SEGRAM address can be set.
The SEGRAM address in the binary form AAA is set to the address counter. SEGRAM can then be
written to or read from by the MPU.
Note:
When performing a horizontal scroll is described above by connecting an extended driver, the
maximum number of characters per line decreases by one. In other words, 49 characters, 29
characters, and 19 characters are displayed in 1-line, 2-line, and 4-line modes, respectively.
Notice that in low power mode (LP = 1), the display shift and scroll cannot be performed.
Read Busy Flag and Address
Read busy flag and address reads the busy flag (BF) indicating that the system is now internally operating
on a previously received instruction. If BF is 1, the internal operation is in progress. The next instruction
will not be accepted until BF is reset to 0. Check the BF status before the next write operation. At the
same time, the value of the address counter in binary AAAAAAA is read out. This address counter is
used by all CG, DD, and SEGRAM addresses, and its value is determined by the previous instruction.
The address contents are the same as for CGRAM, DDRAM, and SEGRAM address set instructions.
Table 10
HS2 to HS0 Settings
HS2
HS1
HS0
Description
0
0
0
No shift.
0
0
1
Shift the display position to the left by one dot.
0
1
0
Shift the display position to the left by two dots.
0
1
1
Shift the display position to the left by three dots.
1
0
0
Shift the display position to the left by four dots.
1
0
1
Shift the display position to the left by five dots.
1
1
0 or 1
No shift.
相關(guān)PDF資料
PDF描述
HCD66712UA02 Dot-Matrix Liquid Crystal Display Controller/Driver
HCD66712UA03 Dot-Matrix Liquid Crystal Display Controller/Driver
HCD66712UA03BP Dot-Matrix Liquid Crystal Display Controller/Driver
HCD66717A13BP TRANSISTOR,BJT,NPN,700V V(BR)CEO,8A I(C),TO-247VAR
HCD66717A03 (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HCD66712UA02 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Dot-Matrix Liquid Crystal Display Controller/Driver
HCD66712UA03 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Dot-Matrix Liquid Crystal Display Controller/Driver
HCD66712UA03BP 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Dot-Matrix Liquid Crystal Display Controller/Driver
HCD66717A03 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
HCD66717A03BP 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
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