參數(shù)資料
型號： HCD404084
廠商： Hitachi,Ltd.
英文描述： Low-Voltage AS Microcomputers with On-Chip A/D Converter(帶片上A/D轉(zhuǎn)換器的低壓微計算機(jī))
中文描述： 低電壓如同在微機(jī)芯片的A / D轉(zhuǎn)換器（帶片上的A / D轉(zhuǎn)換器的低壓微計算機(jī)）
文件頁數(shù)： 144/162頁
文件大?。?/td> 482K
代理商： HCD404084
HD404374/HD404384/HD404389/HD404082/HD404084 Series
144
Item
Symbol
Pins
min.
typ.
max.
Unit
Test conditions
Notes
External clock fall time
t
CPf
OSC
1
—
—
20
ns
f
OSC
=4MHz
7
10
f
OSC
=8MHz
3, 7
INT
0
, EVNB,
WU
0
,
high-level width
t
IH
INT
0
, EVNB,
WU
0
2
—
—
t
cyc
/t
subcyc
8
INT
0
, EVNB,
WU
0
, low-level width
t
IL
INT
0
, EVNB,
WU
0
2
—
—
t
cyc
/t
subcyc
8
RESET
low-level width t
RSTL
RESET
2
—
—
t
cyc
9
RESET
rise time
t
RSTr
RESET
—
—
20
ms
9
Input capacitance
C
in
All input pins
except TEST
—
—
15
pF
f=1MHz,V
in
=0V
TEST
—
—
15
pF
10
TEST
—
—
40
pF
11
Capacitance between
OSC
1
and OSC
2
(Resistance oscillation)
C
RF
OSC
1
, OSC
2
—
—
1
pF
5
Notes: 1. When the subsystem oscillator (32.768 kHz crystal oscillation) is used, use within the range
0.4 MHz
≤
f
≤
1.0 MHz or 1.6 MHz
≤
f
≤
8.5 MHz. The SSR1 bit of the system clock select
register (SSR) should be set to 0 and 1, respectively.
2. The typ. value is the value when V
CC
= 3.5 V.
3. Applies to HD40A4372/4, HD40A4382/4, HD40A4388/9, HD40A4081/2, HD40A4084,
HD407A4374, HD407A4384 and HD407A4389 when V
CC
= 4.0 to 5.5 V.
4. Applies to HD404374 Series.
5. Applies to HD40C4372/4, HD407C4374, HD40C4382/4, HD407C4384, HD40C4388/9,
HD407C4389, HD40C4081/2, HCD40C4082, HD40C4084, HCD40C4084.
6. The oscillation settling time is defined as follows:
(1)
The time required for the oscillation to settle after V
CC
has reached standard minimum at
power-on.
(2)
The time required for the oscillation to settle after
RESET
input has gone low when stop
mode is cleared.
To ensure enough time for the oscillation to settle at power-on hold the
RESET
input low for at
least time t
. The oscillation settling time will depend on the circuit constants and stray
capacitance. The resonator should be determined in consultation with the resonator
manufacturer. With regard to the system clock (OSC
, OSC
), bits MIS1 and MIS0 in the
miscellaneous register (MIS) should be set according to the oscillation settling time of the
resonator used.
7. See figure 79.
8. See figure 80.
9. See figure 81.
10.Applies to Mask ROM.
11.Applies to ZTAT
TM
.
12.Applies to HD40C4081/2, HCD40C4082, HD40C4084, HCD40C4084.
13.Applies to HD40C4372/4, HD407C4374, HD40C4382/4, HD407C4384, HD40C4388/9,
HD407C4389.
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