參數(shù)資料
型號: HCC4089B
廠商: 意法半導(dǎo)體
英文描述: Binary Rate Multiplier(二進(jìn)制數(shù)字多路復(fù)用器)
中文描述: 二進(jìn)制速率倍增器(二進(jìn)制數(shù)字多路復(fù)用器)
文件頁數(shù): 8/13頁
文件大小: 234K
代理商: HCC4089B
A
16 16
B
1
N
When the loopstabilies rate R2 = rate R3, thus fclock (
.
) = fclock (
.
) therefore N = A.B.
16 16
APPLICATION NOTES
Forwords of more than 4 bits,
HCC/HCF4089B
devices maybe cascaded in two different modes : anAdd
modeand a Multiply mode.
Two
HCC/HCF4089B’s
cascaded in the ”Add” mode with a preset number of 189.
Nota :
In theAdd modesome of the gaps left by themore
significant unit at the count of 15 are filled inby the
less significant units. For example, when two units
are cascaded inthe Add mode and programmed to
11 and13,respectively, themoresignificant unit will
have 11 output pulses for every16 input pulses and
the other unit will have 13 output pulses for every
256 input pulses for a totalof
11
13
+
16
256
189
256
=
Two
HCC/HCF4089B’s
cascaded in the Multiply mode for Multiplication of two variables A and B with loop
circuitcontrol.
HCC/HCF4089B
8/13
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