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參數(shù)資料
| 型號(hào)： | HC5515CMZ |
| 廠商： | INTERSIL CORP |
| 元件分類(lèi)： | 模擬傳輸電路 |
| 英文描述： | ITU CO/PABX SLIC with Low Power Standby |
| 中文描述： | TELECOM-SLIC, PQCC28 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MS-018AB, LCC-28 |
| 文件頁(yè)數(shù)： | 15/20頁(yè) |
| 文件大?。?/td> | 469K |
| 代理商： | HC5515CMZ |
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15
FN4235.6
June 6, 2006
SLIC Operating States
Notes
2. Overload Level (Two-Wire port) -
The
specified at the 2-wire port (V
TR0
) with the signal source at the
4-wire receive port (E
RX
). I
DCMET
= 30mA, R
SG
= 4k
,
increase the amplitude of E
RX
until 1% THD is measured at
V
TRO
. Reference Figure 1.
overload
level
is
3. Longitudinal Impedance -
The longitudinal impedance is
computed using the following equations, where TIP and RING
voltages are referenced to ground. L
ZT
, L
ZR
, V
T
, V
R
, A
R
and
A
T
are defined in Figure 2.
(TIP) L
ZT
= V
T
/A
T
,
(RING) L
ZR
= V
R
/A
R
,
where: E
L
= 1V
RMS
(0Hz to 100Hz).
4. Longitudinal Current Limit (Off-Hook Active) -
Off-Hook
(Active, C
1
= 1, C
2
= 0) longitudinal current limit is determined
by increasing the amplitude of E
L
(Figure 3A) until the 2-wire
longitudinal balance drops below 45dB. DET pin remains low
(no false detection).
5. Longitudinal Current Limit (On-Hook Standby) -
On-Hook
(Active, C
1
= 1, C
2
= 1) longitudinal current limit is determined
by increasing the amplitude of E
L
(Figure 3B) until the 2-wire
longitudinal balance drops below 45dB. DET pin remains high
(no false detection).
6. Longitudinal to Metallic Balance -
The longitudinal to metallic
balance is computed using the following equation:
BLME = 20
log (E
L
/V
TR
), where: E
L
and V
TR
are defined in
Figure 4.
7. Metallic to Longitudinal FCC Part 68, Para 68.310 -
The
metallic to longitudinal balance is defined in this spec.
8. Longitudinal to Four-Wire Balance -
The longitudinal to 4-wire
balance is computed using the following equation:
BLFE = 20
log (E
L
/V
TX
),: E
L
and V
TX
are defined in Figure 4.
9. Metallic to Longitudinal Balance -
The metallic to
longitudinal balance is computed using the following equation:
BMLE = 20
log (E
TR
/V
L
), E
RX
= 0,
where: E
TR
,
V
L
and E
RX
are defined in Figure 5.
10. Four-Wire to Longitudinal Balance -
The 4-wire to longitudinal
balance is computed using the following equation:
BFLE = 20
log (E
RX
/V
L
), E
TR
= source is removed.
where: E
RX
,
V
L
and E
TR
are defined in Figure 5.
11. Two-Wire Return Loss -
The 2-wire return loss is computed
using the following equation:
r = -20
log (2V
M
/V
S
).
where: Z
D
= The desired impedance; e.g., the characteristic
impedance of the line, nominally 600
.
(Reference Figure 6).
12. Overload Level (4-Wire port) -
The overload level is specified
at the 4-wire transmit port (V
TXO
) with the signal source (E
G
) at
the 2-wire port, I
DCMET
= 23mA, Z
L
= 20k
, R
SG
= 4k
(Refer-
ence Figure 7). Increase the amplitude of E
G
until 1% THD is
measured at V
TXO
. Note that the gain from the 2-wire port to
the 4-wire port is equal to 1.
13. Output Offset Voltage -
The output offset voltage is specified
with the following conditions: E
G
= 0, I
DCMET
= 23mA, Z
L
=
∞
and is measured at V
TX
. E
G
, I
DCMET
, V
TX
and Z
L
are defined
in Figure 7. Note: I
DCMET
is established with a series 600
resistor between tip and ring.
14. Two-Wire to Four-Wire (Metallic to V
TX
) Voltage Gain -
The
2-wire to 4-wire (metallic to V
TX
) voltage gain is computed
using the following equation.
G
2-4
= (V
TX
/V
TR
), E
G
= 0dBm0, V
TX
, V
TR
, and E
G
are defined
in Figure 7.
15. Current Gain RSN to Metallic -
The current gain RSN to
Metallic is computed using the following equation:
K = I
M
[(R
DC1
+ R
DC2
)/(V
RDC
- V
RSN
)] K, I
M
, R
DC1
, R
DC2
,
V
RDC
and V
RSN
are defined in Figure 8.
16. Two-Wire to Four-Wire Frequency Response -
The 2-wire to
4-wire frequency response is measured with respect to
E
G
= 0dBm at 1.0kHz, E
RX
= 0V, I
DCMET
= 23mA. The
frequency response is computed using the following equation:
F
2-4
= 20
log (V
TX
/V
TR
), vary frequency from 300Hz to
3.4kHz and compare to 1kHz reading.
V
TX
, V
TR
, and E
G
are defined in Figure 9.
17. Four-Wire to Two-Wire Frequency Response -
The 4-wire to
2-wire frequency response is measured with respect to
E
RX
= 0dBm at 1.0kHz, E
G
= 0V, I
DCMET
= 23mA. The
frequency response is computed using the following equation:
F
4-2
= 20
log (V
TR
/E
RX
), vary frequency from 300Hz to
TABLE 1. LOGIC TRUTH TABLE
E0
C1
C2
SLIC OPERATING STATE
ACTIVE DETECTOR
DET OUTPUT
0
0
0
Open Circuit
No Active Detector
Logic Level High
0
0
1
Active
Loop Current Detector
Loop Current Status
0
1
0
Ringing
Ring Trip Detector
Ring Trip Status
0
1
1
Standby
Loop Current Detector
Loop Current Status
1
0
0
Open Circuit
No Active Detector
Logic Level High
1
0
1
Active
Loop Current Detector
1
1
0
Ringing
Ring Trip Detector
1
1
1
Standby
Loop Current Detector
HC5515
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