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| 型號： | HC5509 |
| 廠商： | Intersil Corporation |
| 英文描述： | () |
| 中文描述： | （） |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 316K |
| 代理商： | HC5509 |
4-2
Impedance Matching Design Equations
Before writing the loop equation to solve for the proper feed-
back to match the SLICs 2-wire impedance to the load, the
AC voltage at V
C
and V
D
(Figure 2) must first be determined.
The feedback loop senses the loop current through resistors
R
B2
and R
B4
. For the current direction shown in Figure 2 the
VTX output is equal to +4RS
I
L
. The VTX outputs feedback
into the tip current summing node via the VFB pin. The cur-
rent into VFB is equal to:
4RS I
L
The VTX voltage is also feed into the -IN input of the SLIC’s
internal op amp. This signal is amplified by the ratio
KZ0/KRF then feed into the tip current summing node via the
VOUT1 pin. (Note: the VRX pin and the internal +2V refer-
ence are grounded for the AC analysis.) The current into the
VOUT1 pin is equal to:
4RS I
L
Equation 7 is the node equation for the tip amplifier summing
node. The current in the tip feedback resistor (I
R
) is given in
Equation 8.
4RS I
L
The voltage V
C
is then equal to:
and the AC voltage at V
D
is:
=
(Note V
BAT
/2 is grounded for AC analysis)
Having the voltages at V
C
and V
D
, as a function of the feed-
back network, the loop equation to match the impedance of
any load is as follows:
KR
F
KZ
O
I
L
+
-
I
L
+
-
I
L
+
I
L
+
-
-
-RS
I
L
R
B1
= R
B2
= R
B3
= R
B4
= RS
+RS
I
L
2
4RS
I
L
KRF
+
KZO
4RS
I
L
KRF
2R
KZO
I
VOUT1
=
4RS
I
L
2R
I
VFB
=
I
R
-
-IN
1
V
TX
-
4RS
I
L
+
+
-
+
-
+
-
+
-
V
OUT1
2V
DC
V
BAT
2
V
IN
-
+V
C
R
R
R
2R
2R
R
R/2
R
L
GROUNDED
FOR AC
ANALYSIS
+
V
RX
V
FB
+
-
B
D
R
B3
R
B4
+
-
+V
D
+
-
+
-
I
L
I
L
+
-
A
R
B1
R
B2
GROUNDED
FOR AC
ANALYSIS
C
FIGURE 2. FEEDBACK NETWORK FOR IMPEDANCE MATCHING
+
-
I
VFB
--------------------
=
(EQ. 5)
I
VOUT1
--------------------
-------
=
(EQ. 6)
I
R
–
--------------------
4RS I
L
--------------------
-------
–
+
0
=
(EQ. 7)
I
R
4RS I
L
--------------------
4RS I
L
--------------------
-------
–
=
(EQ. 8)
V
C
I
R
(
)
R
( )
=
(EQ. 9)
V
C
2RS I
L
–
1
-------
–
=
(EQ. 10)
V
D
2RS I
L
1
-------
–
(EQ. 11)
2RS I
L
–
1
-------
–
2RS I
L
V
IN
–
+
+
L I
L
2RS I
L
2RS I
L
–
1
-------
–
0
=
+
(EQ. 12
V
IN
4RS I
L
–
1
-------
–
4RS I
L
RL I
L
+
+
=
(EQ. 13)
V
IN
I
L
4RS
–
1
-------
–
4RS
R
L
+
+
=
(EQ. 14)
Application Note 9607
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HC-5509A1 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:SLIC Subscriber Line Interface Circuit |
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| HC5509B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ITU CO/Loop Carrier SLIC (12 pages) FN2799.6 |
| HC-5509B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:SLIC Subscriber Line Interface Circuit |
| HC-5509B_03 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:ITU CO/Loop Carrier SLIC |
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