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參數(shù)資料
| 型號(hào)： | HB54R1G9F2U |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 1GB Registered DDR SDRAM DIMM |
| 中文描述： | 1GB的DDR SDRAM的內(nèi)存注冊(cè) |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大?。?/td> | 159K |
| 代理商： | HB54R1G9F2U |
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HB54R1G9F2U-A75B/B75B/10B
Data Sheet E0192H30 (Ver. 3.0)
5
Serial PD Matrix*
1
Byte No.
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Comments
0
Number of bytes utilized by module
manufacturer
Total number of bytes in serial PD
device
Memory type
1
0
0
0
0
0
0
0
80
128
1
0
0
0
0
1
0
0
0
08
256 byte
2
0
0
0
0
0
1
1
1
07
SDRAM DDR
3
Number of row address
0
0
0
0
1
1
0
1
0D
13
4
Number of column address
0
0
0
0
1
0
1
1
0B
11
5
Number of DIMM banks
0
0
0
0
0
0
1
0
02
2
6
Module data width
0
1
0
0
1
0
0
0
48
72 bits
7
Module data width continuation
0
0
0
0
0
0
0
0
00
0 (+)
8
Voltage interface level of this assembly 0
DDR SDRAM cycle time, CL = X
-A75B
-B75B
0
0
0
0
1
0
0
04
SSTL 2.5V
9
0
1
1
1
0
0
0
0
70
CL = 2.5*
5
0
1
1
1
0
1
0
1
75
-10B
SDRAM access from clock (tAC)
-A75B/B75B
-10B
1
0
0
0
0
0
0
0
80
10
0
1
1
1
0
1
0
1
75
0.75ns*
5
1
0
0
0
0
0
0
0
80
0.8ns*
5
11
DIMM configuration type
0
0
0
0
0
0
1
0
02
ECC
7.8 μs
Self refresh
×
4
12
Refresh rate/type
1
0
0
0
0
0
1
0
82
13
Primary SDRAM width
0
0
0
0
0
1
0
0
04
14
Error checking SDRAM width
SDRAM device attributes:
Minimum clock delay back-to-back
column access
SDRAM device attributes:
Burst length supported
SDRAM device attributes: Number of
banks on SDRAM device
SDRAM device attributes:
/CAS latency
SDRAM device attributes:
/CS latency
SDRAM device attributes:
/WE latency
SDRAM module attributes
0
0
0
0
0
1
0
0
04
×
4
15
0
0
0
0
0
0
0
1
01
1 CLK
16
0
0
0
0
1
1
1
0
0E
2, 4, 8
17
0
0
0
0
0
1
0
0
04
4
18
0
0
0
0
1
1
0
0
0C
2, 2.5
19
0
0
0
0
0
0
0
1
01
0
20
0
0
0
0
0
0
1
0
02
1
21
0
0
1
0
0
1
1
0
26
Registered
22
SDRAM device attributes: General
Minimum clock cycle time at
CLX - 0.5
-A75B
-B75B/10B
Maximum data access time (tAC) from
clock at CLX - 0.5
-A75B/B75B
-10B
Minimum clock cycle time at
CLX - 1
Maximum data access time (tAC) from
clock at CLX - 1
Minimum row precharge time (tRP)
1
1
0
0
0
0
0
0
C0
± 0.2V
23
0
1
1
1
0
1
0
1
75
CL = 2*
5
1
0
1
0
0
0
0
0
A0
24
0
1
1
1
0
1
0
1
75
0.75ns*
5
1
0
0
0
0
0
0
0
80
0.8ns*
5
25
0
0
0
0
0
0
0
0
00
26
0
0
0
0
0
0
0
0
00
27
0
1
0
1
0
0
0
0
50
20ns
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| HB54R1G9F2 | 1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2-10B | 1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2-A75B | 1GB Registered DDR SDRAM DIMM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB54R1G9F2U-10B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2U-A75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2U-B75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM |
| HB54R5128KN-10B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB DDR SDRAM SO DIMM |
| HB54R5128KN-A75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB DDR SDRAM SO DIMM |
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