參數(shù)資料
型號: HA16116FP
廠商: Hitachi,Ltd.
元件分類: FPGA
英文描述: 1500000 SYSTEM GATE 1.5 VOLT FPGA
中文描述: 開關(guān)穩(wěn)壓器的斬波式直流/直流轉(zhuǎn)換器
文件頁數(shù): 10/34頁
文件大小: 250K
代理商: HA16116FP
HA16116FP/FPJ, HA16121FP/FPJ
10
2.3 Error Amplifier
Figure 2.3 shows an equivalent circuit of the error amplifier. The error amplifier on these ICs is configured
of a simple NPN transistor differential input amplifier and the output circuit of a constant-current driver.
This amplifier features wide bandwidth (f
T
= 4 MHz) with open loop gain kept to 50 dB, allowing stable
feedback to be applied when the power supply is designed. Phase compensation is also easy.
Both HA16116 and HA16121 have a noninverting input (IN(+)) pin, in order to allow use of the channel 1
error amplifier for inverting control. The channel 2 error amplifier, on the other hand, is used for step-
down control in HA16116 and booster control in HA16121; so the channel 2 noninverting input is
connected internally to Vref.
IN(
)
IN(+)
E/O
40 A
80 A
IC internal V
IN
To internal PWM
comparator
Figure 2.3 Error Amplifier Equivalent Circuit
3. Dead Band (DB) Duty and Soft Start Setting (common to both channels)
3.1 Dead Band Duty Setting
Dead band duty is set by adjusting the DB pin input voltage (V
DB
). A convenient means of doing this is to
connect two external resistors to the Vref of this IC so as to divide V
DB
(see figure 3.1).
V
DB
= Vref
R
2
R
1
+ R
2
V
TH
V
DB
V
TH
V
TL
1
f
OSC
(V)
Duty (DB) =
×
Here, T =
×
100 (%)
This applies when V
DB
> V
TL
.
If V
DB
< V
TL
, there is no PWM output.
Note:
V
TH
: 1.6 V (Typ)
V
TL
: 1.0 V (Typ)
Vref is typically 2.5 V. Select R
1
and R
2
so that 1.0 V
V
DB
1.6 V.
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