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參數(shù)資料
| 型號： | GTL2007 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 13-bit GTL to LVTTL translator with power good control |
| 中文描述： | 13位的GTL的LVTTL有良好的控制權翻譯 |
| 文件頁數(shù)： | 1/19頁 |
| 文件大?。?/td> | 92K |
| 代理商： | GTL2007 |
1.
General description
The GTL2007 is a customized translator between dual Xeon processors, Platform Health
Management, South Bridge and Power Supply LVTTL and GTL signals.
The GTL2007 is derived from the GTL2006 with an enable function added that disables
the error output to the monitoring agent for platforms that monitor the individual error
conditions from each processor. This enable function can be used so that false error
conditions are not passed to the monitoring agent when the system is unexpectedly
powered down. This unexpected power-down could be from a power supply overload, a
CPU thermal trip, or some other event of which the monitoring agent is unaware.
A typical implementation would be to connect each enable line to the system power good
signal or the individual enables to the VRD power good for each processor.
The Nocona and Dempsey/Blackford Xeon processors specify a V
TT
of 1.2 V and 1.1 V,
as well as a nominal V
ref
of 0.76 V and 0.73 V respectively. To allow for future voltage level
changes that may extend V
ref
to 0.63 of V
TT
(minimum of 0.693 V with V
TT
of 1.1 V) the
GTL2009 allows a minimum V
ref
of 0.66 V. Characterization results show that there is little
DC or AC performance variation between these levels.
The GTL2007 is the companion chip to the GTL2009 3-bit GTL Front-Side Bus frequency
comparator that is used in dual-processor Xeon applications.
2.
Features
I
Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver
I
3.0 V to 3.6 V operation
I
LVTTL I/O not 5 V tolerant
I
Series termination on the LVTTL outputs of 30
I
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 500 mA
I
Package offered: TSSOP28
GTL2007
13-bit GTL to LVTTL translator with power good control
Rev. 01 — 2 June 2005
Product data sheet
相關PDF資料 |
PDF描述 |
|---|---|
| GTLP16612AA | 18-Bit Bus Transceiver |
| GTLP16612MEAX | 18-Bit Bus Transceiver |
| GTLP16612MTDX | 18-Bit Bus Transceiver |
| GTLP16616MEAX | Bus Transceiver |
| GTLP16616MTDX | Bus Transceiver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GTL2007PW | 功能描述:轉換 - 電壓電平 12-BIT XEON GTL TO LVTTL TRANS RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| GTL2007PW,112 | 功能描述:轉換 - 電壓電平 12-BIT XEON GTL TO RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| GTL2007PW,118 | 功能描述:轉換 - 電壓電平 12BIT XEON GTL/LVTTL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| GTL2007PW-T | 功能描述:轉換 - 電壓電平 12BIT XEON GTL/LVTTL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| GTL2008 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs |
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