參數(shù)資料
型號(hào)： GS9062*
英文描述： 270Mb/s Serializer with EDH for SDI and DVB-ASI. 3.3/1.8V supply.
中文描述： 270Mb / s的空間數(shù)據(jù)基礎(chǔ)設(shè)施和DVB硬腦膜外血腫序列化，意大利航天局。 3.3/1.8V供應(yīng)。
文件頁(yè)數(shù)： 8/47頁(yè)
文件大?。?/td> 754K
GENNUM CORPORATION
22208 - 0
8 of 47
G
22
CD_GND
-
Power
Ground connection for the serial digital cable driver. Connect to analog
GND.
23, 24
SDO, SDO
Analog
Output
Serial digital loop-through output signal operating at 270Mb/s.
The slew rate of these outputs is automatically controlled to meet SMPTE
259M specifications.
25
RESET_TRST
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to reset the internal operating conditions to default settings and to
reset the JTAG test sequence.
Host Mode (JTAG/HOST = LOW)
When asserted LOW, all functional blocks will be set to default conditions
and all input and output signals become high
impedance, including the
serial digital outputs SDO and
SDO.
Must be set HIGH for normal device operation.
JTAG Test Mode (JTAG/HOST = HIGH)
When asserted LOW, all functional blocks will be set to default and the
JTAG test sequence will be held in reset.
When set HIGH, normal operation of the JTAG test sequence resumes.
26
JTAG/HOST
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select JTAG Test Mode or Host Interface Mode.
When set HIGH, CS_TMS, SDOUT_TDO, SDI_TDI and SCLK_TCK are
configured for JTAG boundary scan testing.
When set LOW, CS_TMS, SDOUT_TDO, SDI_TDI and SCLK_TCK are
configured as GSPI pins for normal host interface operation.
27
CS_TMS
Synchronous
with
SCLK_TCK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Chip Select / Test Mode Select
Host Mode (JTAG/HOST = LOW)
CS_TMS operates as the host interface chip select,
CS
,
and is active
LOW.
JTAG Test Mode (JTAG/HOST = HIGH)
CS_TMS operates as the JTAG test mode select, TMS, and is active HIGH.
28
SDOUT_TDO
Synchronous
with
SCLK_TCK
Output
CONTROL SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Serial Data Output / Test Data Output
Host Mode (JTAG/HOST = LOW)
SDOUT_TDO operates as the host interface serial output, SDOUT, used to
read status and configuration information from the internal registers of the
device.
JTAG Test Mode (JTAG/HOST = HIGH)
SDOUT_TDO operates as the JTAG test data output, TDO.
1.2 PIN DESCRIPTIONS (CONTINUED)
PIN
NUMBER
NAME
TIMING
TYPE
DESCRIPTION
相關(guān)PDF資料
PDF描述
GS9064 Telecomm/Datacomm
GSA1 Fuse
GSA1.25 Fuse
GSA1.6 Fuse
GSA10 Fuse
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS9062_07 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II SD-SDI and DVB-ASI Serializer with ClockCleaner
GS9062-CF 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II SD-SDI and DVB-ASI Serializer with ClockCleaner
GS9062-CFE3 制造商:Semtech Corporation 功能描述:Dual Standard Serializer 80-Pin LQFP 制造商:Semtech Corporation 功能描述:Transmitter for SD-SDI & DVB-ASI
GS9064 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*