參數(shù)資料
型號(hào): GS881Z18T-80I
廠商: GSI TECHNOLOGY
元件分類(lèi): DRAM
英文描述: 8Mb Pipelined and Flow Through Synchronous NBT SRAMs
中文描述: 512K X 18 ZBT SRAM, 14 ns, PQFP100
封裝: TQFP-100
文件頁(yè)數(shù): 34/34頁(yè)
文件大?。?/td> 542K
代理商: GS881Z18T-80I
Rev: 1.10 8/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
34/34
1998, Giga Semconductor, Inc.
Preliminary
.
GS881Z18/36T-11/100/80/66
DS/DateRev. Code: Old;
New
Types of Changes
Format or Content
Page /Revisions/Reason
GS881Z18/36TRev1.04h 5/
1999;
1.05 9/1999
Format/Typos
Last Page/Fixed “GSGS..” in Ordering Information
Note.Document/Changed format of all E’s from EN to EN.
Timing Diagrams/Changed format. ex. A0 to A0.
Flow Through Timing Diagrams/Upper case “T” in Flow
Through. thru to Through.
Pin outs/Block Diagrams -Updated format to small caps.
Added Rev History.
5/Fixed TQFP pin description table to match pinout/
Enhancement.
5/Changed chip enables to match pins./Clarification
Ordered Address inputs in pin description table to match pin
out.
Changed Dimension D in Dimension table from 20.1 to 22.1/
Correction.
Speed Bins on Page 1/Last column-changed 12ns to 15ns
and 15ns to 12ns.
Improved Appearance of Timing Diagrams.
Minor formatting changes.
Content
GS881Z18/36T 1.05 9/
1999K/ 1.06 10/1999
Format
GS881Z18/36T 1.06 9/
1999K 1.07 1/2000L
Content
New GSI Logo.
Rev.1.08; 881Z18_r1_09
Content/Format
Removed 166 and 150 MHz speed bins
Used 100 MHz Pipeline numbers for 133 MHz
Changed all 133 MHz references to 11 ns
Updated format to comply with Technical Publications
standards
Updated Capitance table—removed Input row and changed
Output row to I/O
881Z18_r1_09;
881Z18_r1_10
Content
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