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參數(shù)資料
| 型號： | GS880Z18AT-200I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 9MB的流水線和流量，通過同步唑的SRAM |
| 文件頁數(shù)： | 16/25頁 |
| 文件大?。?/td> | 753K |
| 代理商： | GS880Z18AT-200I |
Rev: 1.02 9/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
16/25
2001, Giga Semiconductor, Inc.
GS880Z18/36AT-250/225/200/166/150/133
AC Test Conditions
Parameter
Conditions
V
DD
– 0.2 V
0.2 V
1 V/ns
V
DD
/2
V
DDQ
/2
Fig. 1
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
3.
DC Electrical Characteristics
Parameter
Input Leakage Current
(except mode pins)
Symbol
Test Conditions
Min
Max
I
IL
V
IN
= 0 to V
DD
–
1 uA
1 uA
ZZ Input Current
I
IN1
V
DD
≥
V
IN
≥
V
IH
0 V
≤
V
IN
≤
V
IH
V
DD
≥
V
IN
≥
V
IL
0 V
≤
V
IN
≤
V
IL
Output Disable, V
OUT
= 0 to V
DD
I
OH
=
–
8 mA, V
DDQ
= 2.375 V
I
OH
=
–
8 mA, V
DDQ
= 3.135 V
I
OL
= 8 mA
–
1 uA
–
1 uA
1 uA
100 uA
FT Input Current
I
IN2
–
100 uA
–
1 uA
1 uA
1 uA
Output Leakage Current
I
OL
V
OH2
V
OH3
V
OL
–
1 uA
1 uA
Output High Voltage
1.7 V
—
Output High Voltage
2.4 V
—
Output Low Voltage
—
0.4 V
DQ
V
DDQ/2
50
30pF
*
Output Load 1
* Distributed Test Jig Capacitance
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