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參數(shù)資料
| 型號： | GS880F32AGT-5.5IT |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 256K X 32 CACHE SRAM, 5.5 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 21/23頁 |
| 文件大小： | 573K |
| 代理商： | GS880F32AGT-5.5IT |
GS880F18/32/36AT-5.5/6/6.5/7/7.5/8.5
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
7/23
2001, GSI Technology
Note:
There is a pull-down device on the ZZ pin, so this input pin can be unconnected and the chip will operate in the default states as specified in
the above tables.
Burst Counter Sequences
BPR 1999.05.18
Mode Pin Functions
Mode Name
Pin Name
State
Function
Burst Order Control
LBO
L
Linear Burst
H
Interleaved Burst
Power Down Control
ZZ
L or NC
Active
H
Standby, IDD = ISB
Note:
The burst counter wraps to initial state on the 5th clock.
Note:
The burst counter wraps to initial state on the 5th clock.
Linear Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
Interleaved Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS880F32AT-5.5 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880F32AT-5.5I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880F32AT-6 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880F32AT-6.5 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
| GS880F32AT-6.5I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs |
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