參數(shù)資料
型號(hào)： GS8662QT10BGD-250T
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 8M X 9 QDR SRAM, 0.45 ns, PBGA165
封裝： 13 X 15 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165
文件頁數(shù)： 3/29頁
文件大?。?/td> 303K
代理商： GS8662QT10BGD-250T
GS8662QT07/10/19/37BD-357/333/300/250/200
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 5/2011
11/29
2011, GSI Technology
State Diagram
Power-Up
Read NOP
Load New
Read Address
DDR Read
Write NOP
Load New
Write Address
DDR Write
WRITE
READ
WRITE
READ
WRITE
Always
(Fixed)
Always
(Fixed)
READ
WRITE
Notes:
1. Internal burst counter is fixed as 1-bit linear (i.e., when first address is A0+), next internal burst address is A0+1.
2. “READ” refers to read active status with R = Low, “READ” refers to read inactive status with R = High. The same is
true for “WRITE” and “WRITE”.
3. Read and write state machine can be active simultaneously.
4. State machine control timing sequence is controlled by K.
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