- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383051 > GS8644Z72C-250 (Electronic Theatre Controls, Inc.) 72Mb Pipelined and Flow Through Synchronous NBT SRAM PDF資料下載
參數(shù)資料
| 型號： | GS8644Z72C-250 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 72Mb流水線和流量，通過同步唑的SRAM |
| 文件頁數(shù)： | 27/39頁 |
| 文件大小： | 1174K |
| 代理商： | GS8644Z72C-250 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
Product Preview
GS8644Z18(B/E)/GS8644Z36(B/E)/GS8644Z72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
27/39
2003, GSI Technology
JTAG TAP Block Diagram (2-die module)
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
Instruction Register
ID Code Register
·
31 30 29
Boundary Scan Register
0
1
2
0
· · ·
1
2
0
Bypass Register
TDI
TDO
TMS
TCK
Test Access Port (TAP) Controller
1
·
1
0
·
·
·
·
·
·
·
·
·
Control Signals
·
Instruction Register
ID Code Register
·
31 30 29
Boundary Scan Register
0
1
2
0
· · ·
1
2
0
Bypass Register
TDI
TDO
Test Access Port (TAP) Controller
1
·
1
0
·
·
·
·
·
·
·
·
·
Control Signals
·
··
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8644Z36E-250 | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644Z36E-250I | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644Z18E-133 | CONN 2MM SKT 20POS THRU-BRD SMD |
| GS8644Z36E-133 | Header; No. of Contacts:10; Pitch Spacing:0.079"; No. of Rows:2; Gender:Male; Series:1552; Body Material:Glass Filled Polyester; Connector Retention Style:Latch/Ejector; Housing Style:Straight; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| GS8644Z36E-133I | Header; No. of Contacts:10; Pitch Spacing:0.079"; No. of Rows:2; Gender:Male; Series:1552; Body Material:Glass Filled Polyester; Connector Retention Style:Latch/Ejector; Contact Termination:Through Hole; Housing Style:Right-Angle RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8644Z72C-250I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644Z72GC-200 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 72MBIT 1MX72BIT 6.5NS/3NS 209FPBGA - Trays |
| GS8644Z72GC-250 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 72MBIT 1MX72BIT 6.5NS/3NS 209FPBGA - Trays |
| GS8644ZV18B | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644ZV18B-133 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 72MBIT 4MX18 8.5NS/3.5NS 119FBGA - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。