參數(shù)資料
型號(hào): GS8644Z18E-250IV
廠商: GSI TECHNOLOGY
元件分類(lèi): DRAM
英文描述: 72Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 4M X 18 ZBT SRAM, 6.5 ns, PBGA165
封裝: 15 X 17 MM, 1 MM PITCH, FPBGA-165
文件頁(yè)數(shù): 13/30頁(yè)
文件大?。?/td> 744K
代理商: GS8644Z18E-250IV
Preliminary
GS8644Z18/36E-xxxV
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 6/2006
13/30
2003, GSI Technology
V
DDQ2
& V
DDQ1
Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
V
DD
Input High Voltage
V
IH
0.6*V
DD
V
DD
+ 0.3
V
1
V
DD
Input Low Voltage
V
IL
0.3
0.3*V
DD
V
1
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
2 V > Vi < V
DDn
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
2.
Recommended Operating Temperatures
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
Ambient Temperature (Commercial Range Versions)
T
A
0
25
70
°
C
2
Ambient Temperature (Industrial Range Versions)
T
A
40
25
85
°
C
2
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
2 V > Vi < V
DDn
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
2.
20% tKC
V
SS
2.0 V
50%
V
SS
V
IH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
20% tKC
V
DD
+ 2.0 V
50%
V
DD
V
IL
Capacitance
(T
A
= 25
o
C, f = 1 MH
Z
, V
DD
Parameter
Symbol
Test conditions
Typ.
Max.
Unit
Input Capacitance
C
IN
V
IN
= 0 V
4
5
pF
Input/Output Capacitance
C
I/O
V
OUT
= 0 V
6
7
pF
Note:
These parameters are sample tested.
= 2.5 V)
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