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參數(shù)資料
| 型號： | GS842Z18CB-250T |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 256K X 18 ZBT SRAM, 5.5 ns, PBGA119 |
| 封裝： | FPBGA-119 |
| 文件頁數(shù)： | 8/29頁 |
| 文件大小： | 248K |
| 代理商： | GS842Z18CB-250T |
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GS842Z18CB/GS842Z36CB
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 8/2011
16/29
2011, GSI Technology
Notes:
1. These parameters are sampled and are not 100% tested.
2. ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
AC Electrical Characteristics
Parameter
Symbol
-250
-200
-166
-150
-100
Un
it
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Pipeline
Clock Cycle Time
tKC
4.0
—
5.5
—
6.0
—
6.7
—
10
—
ns
Clock to Output Valid
tKQ
—
2.5
—
3.0
—
3.5
—
3.8
—
4.5
ns
Clock to Output Invalid
tKQX
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
Clock to Output in Low-Z
tLZ1
1.5—1.5—1.5—
1.5
—
1.5
—
ns
Setup time
tS
1.2
—
1.4
—
1.5
—
1.5
—
2.0
—
ns
Hold time
tH
0.2—0.4—0.5—
0.5
—
0.5
—
ns
Flow
Through
Clock Cycle Time
tKC
5.5
—
6.5
—
7.0
—
7.5
—
12.0
—
ns
Clock to Output Valid
tKQ
—
5.5
—
6.5
—
7.0
—
7.5
—
12.0
ns
Clock to Output Invalid
tKQX
2.0
—
2.0
—
2.0
—
2.0
—
2.0
—
ns
Clock to Output in Low-Z
tLZ1
2.0—2.0—2.0—
2.0
—
2.0
—
ns
Setup time
tS
1.5
—
1.5
—
1.5
—
1.5
—
2.0
—
ns
Hold time
tH
0.5—0.5—0.5—
0.5
—
0.5
—
ns
Clock HIGH Time
tKH
1.3
—
1.3
—
1.3
—
1.3
—
1.3
—
ns
Clock LOW Time
tKL
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
Clock to Output in High-Z
tHZ1
1.5
2.5
1.5
3.0
1.5
3.0
1.5
3.0
1.5
5
ns
G to Output Valid
tOE
—
2.5
—
3.0
—
3.5
—
3.8
—
5
ns
G to output in Low-Z
tOLZ1
0—0—0
—
0
—
0
—
ns
G to output in High-Z
tOHZ1
—2.5
—3.0
—
3.0
—
5
ns
ZZ setup time
tZZS2
5—5—5
—
5
—
5
—
ns
ZZ hold time
tZZH2
1—1—1
—
1
—
1
—
ns
ZZ recovery
tZZR
20
—
20
—
20
—
20
—
20
—
ns
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