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| 型號： | GS8322Z18B-166IV |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 2M X 18 ZBT SRAM, 8 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, FPBGA-119 |
| 文件頁數(shù)： | 22/39頁 |
| 文件大?。?/td> | 973K |
| 代理商： | GS8322Z18B-166IV |
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AC Electrical Characteristics
Parameter
Symbol
-250
-225
-200
-166
-150
-133
Unit
Min
4.0
—
1.5
Max
—
3.0
—
Min
4.4
—
1.5
Max
—
3.0
—
Min
5.0
—
1.5
Max
—
3.0
—
Min
6.0
—
1.5
Max
—
3.5
—
Min
6.7
—
1.5
Max
—
3.8
—
Min
7.5
—
1.5
Max
—
4.0
—
Pipeline
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
tKC
tKQ
tKQX
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tS
tKC
tKQ
tKQX
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
Setup time
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
1.5
6.5
—
3.0
—
—
6.5
—
1.5
7.0
—
3.0
—
—
7.0
—
1.5
7.5
—
3.0
—
—
7.5
—
1.5
8.0
—
3.0
—
—
8.0
—
1.5
8.5
—
3.0
—
—
8.5
—
1.5
8.5
—
3.0
—
—
8.5
—
ns
ns
ns
ns
Flow
Through
Clock to Output in Low-Z
tLZ
1
tS
tH
tKH
tKL
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
ns
Setup time
Hold time
Clock HIGH Time
Clock LOW Time
Clock to Output in
High-Z
(x18/x36)
Clock to Output in
High-Z
(x72)
G to Output Valid
(x18/x36)
G to Output Valid
(x72)
1.5
0.5
1.3
1.7
—
—
—
—
1.5
0.5
1.3
1.7
—
—
—
—
1.5
0.5
1.3
1.7
—
—
—
—
1.5
0.5
1.3
1.7
—
—
—
—
1.5
0.5
1.5
1.7
—
—
—
—
1.5
0.5
1.7
2
—
—
—
—
ns
ns
ns
ns
tHZ
1
1.5
2.5
1.5
2.7
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
ns
tHZ
1
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
ns
tOE
—
2.5
—
2.7
—
3.0
—
3.5
—
3.8
—
4.0
ns
tOE
—
3.0
—
3.0
—
3.0
—
3.5
—
3.8
—
4.0
ns
G to output in Low-Z
tOLZ
1
0
—
0
—
0
—
0
—
0
—
0
—
ns
G to output in High-Z
(x18/x36)
G to output in High-Z
(x72)
tOHZ
1
—
2.5
—
2.7
—
3.0
—
3.0
—
3.0
—
3.0
ns
tOHZ
1
—
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
3.0
ns
ZZ setup time
tZZS
2
5
—
5
—
5
—
5
—
5
—
5
—
ns
ZZ hold time
tZZH
2
tZZR
1
—
1
—
1
—
1
—
1
—
1
—
ns
ZZ recovery
20
—
20
—
20
—
20
—
20
—
20
—
ns
GS8322Z18/36/72(B/E/C)-xxxV
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 6/2006
22/39
2002, GSI Technology
Notes:
1.
2.
These parameters are sampled and are not 100% tested.
ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8322Z18B-166V | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322Z18B-200IV | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322Z18B-200V | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322Z18B-225IV | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322Z18B-225V | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8322Z18B-166V | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 36MBIT 2MX18 8NS/3.5NS 119FPBGA - Trays |
| GS8322Z18B-200 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 36MBIT 2MX18 7.5NS/3NS 119FBGA - Trays |
| GS8322Z18B-200I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 36MBIT 2MX18 7.5NS/3NS 119FBGA - Trays |
| GS8322Z18B-200IV | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 36MBIT 2MX18 7.5NS/3NS 119FPBGA - Trays |
| GS8322Z18B-200V | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 36MBIT 2MX18 7.5NS/3NS 119FPBGA - Trays |
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