參數(shù)資料
型號: GS8322V18GE-250
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
中文描述: 2M X 18 CACHE SRAM, 6.5 ns, PBGA165
封裝: 15 X 17 MM, 1 MM PITCH, LEAD FREE, FPBGA-165
文件頁數(shù): 19/42頁
文件大?。?/td> 1038K
代理商: GS8322V18GE-250
AC Test Conditions
Parameter
Conditions
V
DD
– 0.2 V
0.2 V
1 V/ns
V
DD
/2
V
DDQ
/2
Fig. 1
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
3.
Preliminary
GS8322V18(B/E)/GS8322V36(B/E)/GS8322V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 4/2005
19/42
2003, GSI Technology
DQ
V
DDQ/2
50
30pF
*
Output Load 1
* Distributed Test Jig Capacitance
DC Electrical Characteristics
Parameter
Input Leakage Current
(except mode pins)
Symbol
Test Conditions
Min
Max
I
IL
V
IN
= 0 to V
DD
1 uA
1 uA
ZZ Input Current
I
IN1
V
DD
V
IN
V
IH
0 V
V
IN
V
IH
V
DD
V
IN
V
IL
0 V
V
IN
V
IL
Output Disable, V
OUT
= 0 to V
DD
I
OH
=
4 mA, V
DDQ
= 1.6 V
I
OL
= 4 mA, V
DD
= 1.6 V
1 uA
1 uA
1 uA
100 uA
FT, SCD, and ZQ Input Current
I
IN2
100 uA
1 uA
1 uA
1 uA
Output Leakage Current
I
OL
V
OH1
V
OL1
1 uA
1 uA
Output High Voltage
V
DDQ
– 0.4 V
Output Low Voltage
0.4 V
相關(guān)PDF資料
PDF描述
GS8322V18GE-250I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36B-133 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36B-133I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36B-150 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36B-150I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
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參數(shù)描述
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GS8322V72C-150I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/3.8NS 209FBGA - Trays
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