參數(shù)資料
型號: GS832236E-150I
廠商: Electronic Theatre Controls, Inc.
英文描述: 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
中文描述: 200萬× 18,100萬× 36,為512k × 72分配36MB的S /雙氰胺同步突發(fā)靜態(tài)存儲器
文件頁數(shù): 29/41頁
文件大?。?/td> 1223K
代理商: GS832236E-150I
Preliminary
GS832218(B/E)/GS832236(B/E)/GS832272(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.06 9/2004
29/41
2001, GSI Technology
JTAG TAP Block Diagram
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
ID Register Contents TBD for this part.
Instruction Register
ID Code Register
·
31 30 29
Boundary Scan Register
0
1
2
0
· · ·
1
2
0
Bypass Register
TDI
TDO
TMS
TCK
Test Access Port (TAP) Controller
1
·
1
0
·
·
·
·
·
·
·
·
·
Control Signals
·
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