- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384350 > GS8321Z36GE-200 (GSI TECHNOLOGY) 36Mb Pipelined and Flow Through Synchronous NBT SRAMs PDF資料下載
參數(shù)資料
| 型號： | GS8321Z36GE-200 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| 中文描述： | 1M X 36 ZBT SRAM, 7.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165 |
| 文件頁數(shù)： | 13/34頁 |
| 文件大?。?/td> | 746K |
| 代理商： | GS8321Z36GE-200 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
GS8321Z18/32/36E-250/225/200/166/150/133
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.06b 2/2006
13/34
2003, GSI Technology
Sleep Mode
During normal operation, ZZ must be pulled low, either by the user or by it’s internal pull down resistor. When ZZ is pulled high,
the SRAM will enter a Power Sleep mode after 2 cycles. At this time, internal state of the SRAM is preserved. When ZZ returns to
low, the SRAM operates normally after ZZ recovery time.
Sleep mode is a low current, power-down mode in which the device is deselected and current is reduced to I
SB
2. The duration of
Sleep mode is dictated by the length of time the ZZ is in a high state. After entering Sleep mode, all inputs except ZZ become
disabled and all outputs go to High-Z The ZZ pin is an asynchronous, active high input that causes the device to enter Sleep mode.
When the ZZ pin is driven high, I
SB
2 is guaranteed after the time tZZI is met. Because ZZ is an asynchronous input, pending
operations or operations in progress may not be properly completed if ZZ is asserted. Therefore, Sleep mode must not be initiated
until valid pending operations are completed. Similarly, when exiting Sleep mode during tZZR, only a Deselect or Read commands
may be applied while the SRAM is recovering from Sleep mode.
Sleep Mode Timing Diagram
tZZR
tZZH
tZZS
tKL
tKH
tKC
CK
ZZ
Designing for Compatibility
The GSI NBT SRAMs offer users a configurable selection between Flow Through mode and Pipelinemode via the FT signal found
on Pin 14. Not all vendors offer this option, however most mark Pin 14 as V
DD
or V
DDQ
on pipelined parts and V
SS
on flow
through parts. GSI NBT SRAMs are fully compatible with these sockets.
相關PDF資料 |
PDF描述 |
|---|---|
| GS8321Z36GE-225 | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z36GE-250 | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8322Z18E-225IV | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322Z18B-133IV | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322Z18B-133V | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GS8321Z36GE-200IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z36GE-200V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z36GE-225 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z36GE-225IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z36GE-225V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
發(fā)布緊急采購，3分鐘左右您將得到回復。