參數資料
型號: GS8321Z36GE-166
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 36Mb Pipelined and Flow Through Synchronous NBT SRAMs
中文描述: 1M X 36 ZBT SRAM, 8 ns, PBGA165
封裝: 15 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165
文件頁數: 26/34頁
文件大小: 746K
代理商: GS8321Z36GE-166
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
011
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
110
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1.
2.
Instruction codes expressed in binary, MSB on left, LSB on right.
Default instruction automatically loaded at power-up and in test-logic-reset state.
GS8321Z18/32/36E-250/225/200/166/150/133
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.06b 2/2006
26/34
2003, GSI Technology
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GS8321Z36GE-200 36Mb Pipelined and Flow Through Synchronous NBT SRAMs
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