- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384349 > GS8321Z18GE-200I (GSI TECHNOLOGY) 36Mb Pipelined and Flow Through Synchronous NBT SRAMs PDF資料下載
參數(shù)資料
| 型號： | GS8321Z18GE-200I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| 中文描述： | 2M X 18 ZBT SRAM, 7.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165 |
| 文件頁數(shù)： | 23/34頁 |
| 文件大?。?/td> | 746K |
| 代理商： | GS8321Z18GE-200I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
Instruction Register
ID Code Register
·
31 30 29
Boundary Scan Register
0
1
2
0
· · ·
1
2
0
Bypass Register
TDI
TDO
TMS
TCK
Test Access Port (TAP) Controller
1
·
1
0
·
·
·
·
·
·
·
·
·
Control Signals
·
GS8321Z18/32/36E-250/225/200/166/150/133
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.06b 2/2006
23/34
2003, GSI Technology
JTAG TAP Block Diagram
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
ID Register Contents
Die
Revision
Code
Not Used
I/O
Configuration
GSI Technology
JEDEC Vendor
ID Code
P
0
1
1
Bit #
x36
x18
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X
X
X
X
0
0
0
X
1
0
0
1
0
0
X
X
X
X
0
0
0
X
1
0
0
1
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
0
0 1 1 0 1 1 0 0 1
0 1 1 0 1 1 0 0 1
相關PDF資料 |
PDF描述 |
|---|---|
| GS8321Z18GE-225 | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z18GE-225I | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z18GE-250 | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z18GE-250I | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z36E-200I | 36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GS8321Z18GE-200IV | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 1.8V 36MBIT 2MX18 7.5NS/3NS 165FBGA - Trays |
| GS8321Z18GE-200V | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 1.8V 36MBIT 2MX18 7.5NS/3NS 165FBGA - Trays |
| GS8321Z18GE-225 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z18GE-225I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
| GS8321Z18GE-225IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:36Mb Pipelined and Flow Through Synchronous NBT SRAMs |
發(fā)布緊急采購，3分鐘左右您將得到回復。