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參數(shù)資料
| 型號： | GS82032Q-4 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | DRAM |
| 英文描述： | 64K x 32 2M Synchronous Burst SRAM |
| 中文描述： | 64K的× 32 200萬同步突發(fā)靜態(tài)存儲器 |
| 文件頁數(shù)： | 13/23頁 |
| 文件大?。?/td> | 760K |
| 代理商： | GS82032Q-4 |
Rev: 1.04 2/2001
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
13/23
2000, Giga Semiconductor, Inc.
Preliminary
GS82032T/Q-150/138/133/117/100/66
AC Electrical Characteristics
Notes:
1.
2.
These parameters are sampled and are not 100% tested
ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Parameter
Symbol
-150
-138
-133
-117
-100
-66
Unit
Min
6.6
—
1.5
Max
—
3.8
—
Min
7.25
—
2
Max
—
4
—
Min
7.5
—
2
Max
—
4
—
Min
8.5
—
2
Max
—
4.5
—
Min
10
—
2
Max
—
5
—
Min
12.5
—
2
Max
—
6
—
Pipeline
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
tKC
tKQ
tKQX
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKC
tKQ
tKQX
1.5
—
2
—
2
—
2
—
2
—
2
—
ns
Flow
Through
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
10.5
—
3
—
9.0
—
15
—
3
—
9.7
—
15
—
3
—
10
—
15
—
3
—
11
—
15
—
3
—
12
—
20
—
3
—
18
—
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKH
tKL
3
—
3
—
3
—
3
—
3
—
3
—
ns
Clock HIGH Time
Clock LOW Time
1.8
1.8
—
—
1.9
1.9
—
—
1.9
1.9
—
—
2
2
—
—
3
3
—
—
4
4
—
—
ns
ns
Clock to Output in High-Z
tHZ
1
tOE
1.5
3.8
1.5
4
1.5
4
1.5
4
—
5
—
6
ns
G to Output Valid
—
3.8
—
4
—
4
—
4
—
5
—
6
ns
G to output in Low-Z
tOLZ
1
0
—
0
—
0
—
0
—
0
—
0
—
ns
G to output in High-Z
tOHZ
1
tS
tH
—
4
—
4
—
4
—
4
—
5
—
6
ns
Setup time
Hold time
1.7
0.5
—
—
2
—
—
2
—
—
2
—
—
2
—
—
2
—
—
ns
ns
0.5
0.5
0.5
0.5
0.5
ZZ setup time
tZZS
2
5
—
5
—
5
—
5
—
5
—
5
—
ns
ZZ hold time
tZZH
2
tZZR
1
—
1
—
1
—
1
—
1
—
1
—
ns
ZZ recovery
20
—
20
—
20
—
20
—
20
—
20
—
ns
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