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參數(shù)資料
| 型號(hào)： | GS81302QT07E-333 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 16M X 8 QDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, FPBGA-165 |
| 文件頁數(shù)： | 4/30頁 |
| 文件大?。?/td> | 914K |
| 代理商： | GS81302QT07E-333 |
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GS81302QT07/10/19/37E-333/300/250/200
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 5/2011
12/30
2011, GSI Technology
State Diagram
Power-Up
Read NOP
Load New
Read Address
DDR Read
Write NOP
Load New
Write Address
DDR Write
WRITE
READ
WRITE
READ
WRITE
Always
(Fixed)
Always
(Fixed)
READ
WRITE
Notes:
1. Internal burst counter is fixed as 1-bit linear (i.e., when first address is A0+), next internal burst address is A0+1.
2. “READ” refers to read active status with R = Low, “READ” refers to read inactive status with R = High. The same is
true for “WRITE” and “WRITE”.
3. Read and write state machine can be active simultaneously.
4. State machine control timing sequence is controlled by K.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS81302TT07E-333IT | 16M X 8 DDR SRAM, 0.45 ns, PBGA165 |
| GS81302TT07GE-333I | 16M X 8 DDR SRAM, 0.45 ns, PBGA165 |
| GS816036AGT-250I | 512K X 36 CACHE SRAM, 5.5 ns, PQFP100 |
| GS8160E36GT-250 | 512K X 36 CACHE SRAM, 5.5 ns, PQFP100 |
| GS816118AGT-200IT | 1M X 18 CACHE SRAM, 6.5 ns, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS81302S18E-167 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 144MBIT 8MX18 0.5NS 165FPBGA - Trays |
| GS81302S18E-167I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 144MBIT 8MX18 0.5NS 165FPBGA - Trays |
| GS81302S18E-200 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 144MBIT 8MX18 0.45NS 165FPBGA - Trays |
| GS81302S18E-200I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 144MBIT 8MX18 0.45NS 165FPBGA - Trays |
| GS81302S18E-250 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 144MBIT 8MX18 0.45NS 165FPBGA - Trays |
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