
Rev: 1.02 9/2001
For latest documentation see http://www.gsitechnology.com.
5/11
1999, Giga Semiconductor, Inc.
GS78116B
AC Test Conditions
AC Characteristics
Read Cycle
Parameter
Symbol
-10
-12
-15
Unit
Min
Max
Min
Max
Min
Max
Read cycle time
t
RC
10
—
12
—
15
—
ns
Address access time
t
AA
—
10
—
12
—
15
ns
Chip enable access time (CE)
t
AC
—
10
—
12
—
15
ns
Output enable to output valid (OE)
t
OE
—
4
—
5
—
6
ns
Output hold from address change
t
OH
3
—
3
—
3
—
ns
Chip enable to output in low Z (CE)
t
LZ*
3
—
3
—
3
—
ns
Output enable to output in low Z (OE)
t
OLZ*
0
—
0
—
0
—
ns
Chip disable to output in High Z (CE)
t
HZ*
—
5
—
6
—
7
ns
Output disable to output in High Z (OE)
t
OHZ*
—
4
—
5
—
6
ns
DQ
VT = 1.4 V
50
30pF
1
DQ
3.3 V
Output Load 1
Output Load 2
589
434
5pF
1
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted
Output load 2 for t
LZ
, t
HZ
, t
OLZ
and t
OHZ
.
3.
Parameter
Conditions
Input high level
V
IH
= 2.4 V
Input low level
V
IL
= 0.4 V
Input rise time
tr = 1 V/ns
Input fall time
tf = 1 V/ns
Input reference level
1.4 V
Output reference level
1.4 V
Output load
Fig. 1& 2