參數(shù)資料
型號(hào)： GS1535A
廠商： Gennum Corporation
英文描述： GS1535A / GS9065A HD-LINX-R II Multi-Rate SDI Automatic Reclocker
中文描述： GS1535A / GS9065A的HD - LINX進(jìn)程- R的第二多速率SDI自動(dòng)時(shí)鐘恢復(fù)器
文件頁(yè)數(shù)： 20/27頁(yè)
文件大小： 345K
代理商： GS1535A
GS1535A / GS9065A Data Sheet
31497 - 3
November 2005
20 of 27
4.6 4:1 Input Mux
The 4:1 input mux allows the connection of four independent streams of video/data.
There are four differential inputs (DDI[3:0] and DDI[3:0]). The active channel can
be selected via the DDI_SEL[1:0] pins.
Table 4-1
shows the input selected for a
given state at DDI_SEL[1:0].
The DDI inputs are designed to be DC interfaced with the output of the
GS1524A/9064A Cable Equalizer. There are on chip 50
Ω
termination resistors
which come to a common point at the DDI_VT pins. Connect a 10nF capacitor to
this pin and connect the other end of the capacitor to ground. This terminates the
transmission line at the inputs for optimum performance.
If only one input pair is used, connect the unused positive inputs to +3.3V and leave
the unused negative inputs floating. This helps to eliminate crosstalk from potential
noise that would couple to the unused input pair.
4.7 Automatic and Manual Data Rate Selection
The GS1535A/9065A can be configured to manually lock to a specific data rate or
automatically search for and lock to the incoming data rate. The AUTO/MAN pin
selects automatic data rate detection mode (Auto mode) when HIGH and manual
data rate selection mode (Manual mode) when LOW.
In Auto mode, the SS[2:0] bi-directional pins become outputs and the bit pattern
indicates the data rate that the PLL is locked to (or previously locked to). The
"search algorithm" cycles through the data rates and starts over if that data rate is
not found (see
Figure 4-3
).
Figure 4-3: Data Rate Search Pattern
Table 4-1: Bit Pattern for Input Select
DDI_SEL[1:0]
Selected Input
00
DDI0
01
DDI1
10
DDI2
11
DDI3
143 Mb\s
177 Mb\s
270Mb\s
360 Mb\s
540 Mb\s
1.485Mb\s
(GS1535A only)
POWER-UP
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