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參數(shù)資料
| 型號： | GS-F8MB-SIMM |
| 廠商： | 意法半導體 |
| 英文描述： | 8MByte SIMM Flash Memory Module(8M字節(jié)SIMM閃速存儲器模塊) |
| 中文描述： | 8MByte上海藥物研究所閃存模塊（上海藥物研究所800萬字節(jié)閃速存儲器模塊） |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 46K |
| 代理商： | GS-F8MB-SIMM |
Memory control is provided by 4 Chip Enable (CE0,
1,2,3) inputs used to address the 4 memory banks
and by 4 Write Enable inputs used to select through
the DQ..... groups. An Output Enable input is used
to read the stored data.
Erase and Program Functions are performed
through the internal Program/Erase Controller
(P/E.C.).
The Data Output chip bits DQ7 and DQ6 (and the
corresponding DQ15 & 14, DQ23 & 22, DQ31 & 30)
provide polling or toggle signals during Automatic
Program or Erase to indicate the Ready/Busy state
of the internal Program/Erase Controller.
Configuration & speed pins
PD1-PD7 pins are used by the SIMM module to
inform the motherboard about its relevant configu-
ration and also about the speed of the chips used,
as specified in the Jedec 21-C standard.
As the module allocates 8Mbyte memory, using 70
ns chips, configuration is the following:
PD1 : Vss PD2 : NC PD3 : NC PD4 : Vss
PD5 : NC PD6 : NC PD7 : Vss
OE
Addr
DQ0-7
CE
WE
OE
Addr
CE
WE
OE
Addr
CE
WE
OE
Addr
DQ0-7
DQ0-7
DQ0-7
CE
WE
OE
Addr
DQ0-7
CE
WE
OE
Addr
CE
WE
OE
Addr
CE
WE
OE
Addr
DQ0-7
DQ0-7
DQ0-7
CE
WE
OE
Addr
DQ0-7
CE
WE
OE
Addr
CE
WE
OE
Addr
CE
WE
OE
Addr
DQ0-7
DQ0-7
DQ0-7
CE
WE
OE
Addr
DQ0-7
CE
WE
OE
Addr
CE
WE
OE
Addr
CE
WE
OE
Addr
DQ0-7
DQ0-7
DQ0-7
CE
WE
WE3
WE2
WE1
WE0
OE
A0 - A18
DQ0 - DQ7
DQ8 - DQ15
DQ16 - DQ23
DQ24 - DQ31
CE0
CE1
CE2
CE3
BANK 1
BANK 2
BANK 3
BANK 4
Fig. 1. Block diagram
2/4
GS-F8MB-SIMM
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