參數(shù)資料
型號(hào): GM71S65400C(CL)
英文描述: 16Mx4|3.3V|4K|5/6|FP/EDO DRAM - 64M
中文描述: 16Mx4 | 3.3 | 4K的| 5 / 6 |計(jì)劃生育/ EDO公司的DRAM - 6400
文件頁數(shù): 5/10頁
文件大小: 113K
代理商: GM71S65400C(CL)
GM71CS16160CL
GM71C16160C
Rev 0.1 / Apr’01
C apacitance
(V
C C
= 5V +/-10%, T
A
= 25C)
Symbol
Parameter
Note
C
I1
C
I2
C
I/O
Input Capacitance (A ddress)
Input Capacitance (Clocks)
Output Capacitance (Data-In/Out)
1
1
1, 2
Unit
pF
pF
pF
M ax
5
7
7
M in
-
-
-
A C C haracteristics
(V
C C
= 5V +/-10%, T
A
= 0 ~
+
70C, V ss = 0V , Note 1, 2, 3, 19)
Test Conditions
Input rise and fall times : 5 ns
Output timing reference levels : 0.4V , 2.4V
Input timing reference levels : 0.8V , 2.4V
Output load : 2TTL gate + C
L
(100 pF)
(Including scope and jig)
Note: 1. Capacitance measured with B oonton Meter or effective capacitance measuring method.
2. UC A S and L C A S = V
IH
to disable D
OU T
.
R ead, W rite, R ead-M odify-W rite and Refresh Cycles
(Common Parameters)
Symbol
Parameter
Note
M ax
Unit
M in
M ax
M in
M ax
M in
t
R C
Random Read or Write Cycle Time
90
-
110
-
130
-
t
R P
30
-
40
-
50
-
t
R A S
50
10,000
60
10,000
70
10,000
t
C A S
10,000
10,000
10,000
15
18
t
A SR
Row A ddress Set up Time
0
-
-
-
0
0
t
R A H
Row A ddress H old Time
7
-
-
-
10
10
t
A SC
Column A ddress Set-up Time
0
-
-
-
0
0
t
C A H
Column A ddress Hold Time
-
-
-
10
15
t
R C D
17
45
45
52
20
20
4
t
R A D
12
30
30
35
15
15
5
t
R SH
RA S H old Time
13
-
-
-
15
18
t
C SH
50
-
-
-
60
70
t
C R P
5
-
-
-
5
5
t
T
T ransition Time (Rise and Fall)
3
50
50
50
3
3
8
R A S Precharge Time
CA S Pulse Width
RA S to C A S Delay Time
RA S to Column A ddress Delay Time
CA S H old Time
C A S to R A S Precharge Time
t
D Z O
0
-
-
-
0
0
t
D Z C
0
-
-
-
0
0
OE Delay Time from D
IN
CA S Delay Time from D
IN
G M 71C (S )16160
C /C L -5
13
-
-
-
15
18
6
OE to D
IN
Delay Time
7
7
t
C P
7
-
10
-
10
-
C A S Precharge Time
t
OD D
G M 71C (S )16160
C /C L -6
G M 71C (S )16160
C /C L -7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
13
7
25
22
22
23
RA S Pulse W idth
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