參數(shù)資料
型號: GLT41016-45J4
廠商: Electronic Theatre Controls, Inc.
英文描述: 64K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
中文描述: 64K的× 16的CMOS動態(tài)RAM的擴(kuò)展數(shù)據(jù)輸出
文件頁數(shù): 5/23頁
文件大?。?/td> 2849K
代理商: GLT41016-45J4
G-LINK
GLT41016
64K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
Dec 1998 (Rev 2.1)
G-Link Technology Corporation
2701Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation, Taiwan
2F, No.12, R&D Rd. II, Science-Based Industrial Park,
Hsin Chu, Taiwan, R.O.C.
- 5 -
Truth Table: GLT41016
Function
RAS
H
L
CASL CASH
H
X
L
WE
X
H
OE
X
L
ADDRESS
DQs
Notes
Standby
Read: Word
H
X
L
High-Z
ROW/COL Data Out
Read: Lower Byte
L
L
H
H
L
ROW/COL Lower Byte,Data-
Out
Upper Byte,High-Z
ROW/COL Lower Byte,High-Z
Upper Byte,Data-
Out
ROW/COL Data-In
Read: Upper Byte
L
H
L
H
L
Write: Word(Early Write)
L
L
L
L
X
Write: Lower Byte (Early)
L
L
H
L
X
ROW/COL Lower Byte,Data-In
Upper Byte,High-Z
ROW/COL Lower Byte,High-Z
Upper Byte,Data-In
ROW/COL Data-Out,Data-In
Write: Upper Byte (Early)
L
H
L
L
X
Read Write
L
L
L
H
L
H
L
H
L
1,2
EDO-Page-
Mode Read
1st Cycle
2nd Cycle
L
L
H
L
H
L
H
L
H
L
H
L
ROW/COL
COL
Data-Out
Data-Out
1
1
EDO-Page-
Mode Write
1st Cycle
2nd Cycle
L
L
H
L
H
L
H
L
H
L
L
L
X
X
ROW/COL
COL
Data-In
Data-In
2
2
EDO-Page-
Mode Read-
Write
1st Cycle
2nd Cycle
L
L
H
L
H
L
H
L
H
L
H
L
H
L
L
H
L
H
ROW/COL
COL
Data-Out,Data-In
Data-Out,Data-In
1,2
1,2
Hidden
Refresh
Read
Write
L
H
L
L
H
L
L
L
L
H
L
L
H
H
L
X
L
X
X
ROW/COL
ROW/COL
ROW
Data-Out
Data-In
High-Z
1
2,3
RAS -Only Refresh
CBR Refresh
H
L
L
L
X
X
High-Z
4
Notes:
1. These READ cycles may also be BYTE READ cycles (either UCASor LCAS active).
2. These WRITE cycles may also be BYTE READ cycles (either UCAS or LCAS active).
3. EARLY WRITE only.
4. At least one of the two CAS signals must be active (UCAS or LCAS).
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