參數(shù)資料
型號： GL860A-PMGXX
廠商： Genesys Logic, Inc.
英文描述： USB 2.0 UVC Camera Controller
中文描述： 紫外線相機(jī)的USB 2.0控制器
文件頁數(shù)： 27/42頁
文件大?。?/td> 1020K
代理商： GL860A-PMGXX
GL860A USB 2.0 UVC Camera Controller
2007 GenesysLogic, Inc. - All rights reserved.
Page 27
7-2 RESERVED -
1 FRAM_EN
Set 1 to enable, header function..
0 HEAD_EN
Set 1 to add Header for each frame, Set 0 to add Header for each SOF.
Offset 61h – HEADCTL2 ……...………………………………………..……… Default value = 8’h00
--
--
--
--
HEADCNT0
HEADCNT0
HEADCNT0
HEADCNT0
--
--
--
--
R/W
R/W
R/W
R/W
7-4 RESERVED -
3-0
HEADCNT[3:0]
Select header byte count from 0~8.
Offset 62h – HEAD0 ……………………………………………………..……… Default value = 8’h00
H0DAT7
H0DAT6
H0DAT5
H0DAT4
H0DAT3
H0DAT2
H0DAT1
H0DAT0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 H0DAT[7:0]
Head data 0.
Offset 63h – HEAD1 ……………………………………………………..……… Default value = 8’h00
H1DAT7
H1DAT6
H1DAT5
H1DAT4
H1DAT3
H1DAT2
H1DAT1
H1DAT0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 H1DAT[7:0]
Head data 1.
4.2.3 Sensor Register Part
Offset C0h – SENCTL ………………………………………..……..………… Default value = 8’h00
INCTST
EDGESEL
CLKOE
VSATV
HSATV
HVOE
--
BITMODE
R/W
R/W
R/W
R/W
R/W
R/W
--
R/W
7 INCTST
0
No incremental data on CMSDAT[9:0]
1 Incremental data on CMSDAT[9:0] for debugging
6 EDGESEL
Rising/Falling edge of PIX_CLK selection
0 The same with the PIX_CLK
1 Inverse with the PIX_CLK
5 CLKOE
MAS_CLK output selection
0 Input clock (PIX_CLK)
1 Output clock (MAS_CLK)
4 VSATV
Select of timing to reset internal line count when VSYNC is coming from sensor.
0 Falling edge
1 Rising edge
3 HSATV
Select of timing to reset internal pixel count when HSYNC is coming from sensor.
0 Falling edge
1 Rising edge
2 HVOE
HSYNC/VSYNC output enable
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