參數(shù)資料
型號: GL850G
廠商: Genesys Logic, Inc.
英文描述: USB 2.0 HUB Controller
中文描述: USB 2.0集線器控制器
文件頁數(shù): 17/25頁
文件大?。?/td> 330K
代理商: GL850G
GL850G USB 2.0 Low-Power HUB Controller
2000-2007 Genesys Logic Inc. - All rights reserved.
Page 17
GL850G internally contains a power on reset circuit. The power on sequence is depicted in the next picture.
To fully control the reset process of GL850G, we suggest the reset time applied in the external reset circuit
should longer than that of the internal reset circuit.
2.7
μ
s
Internal reset
External reset
Power good voltage, 2.5~2.8V
DVDD
Figure 5.3 – Power on sequence of GL850G
5.2.2 PGANG/SUSPND Setting
To save pin count, GL850G uses the same pin to decide individual/gang mode as well as to output the
suspend flag. The individual/gang mode is decided within 20us after power on reset. Then, about 50ms later,
this pin is changed to output mode. GL850G outputs the suspend flag once it is globally suspended. For
individual mode, a pull low resister greater than 100K
should be placed. For gang mode, a pull high
resister greater than 100K
should be placed. In figure 5.5, we also depict the suspend LED indicator
schematics. It should be noticed that the polarity of LED must be followed, otherwise the suspend current
will be over spec limitation (2.5mA).
RESET#
GANG_CTL
50 ms
Input mode, strapping
to decide individual or
gang mode
Output mode, Indicating
GL850G Is In normal
mode or suspend mode
Figure 5.4 – Timing of PGANG/SUSPEND strapping
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