參數(shù)資料
型號(hào): GL640USB
廠商: Electronic Theatre Controls, Inc.
英文描述: IEEE-1284 to USB Bridge
中文描述: 符合IEEE - 1284的USB橋接
文件頁數(shù): 8/39頁
文件大?。?/td> 2027K
代理商: GL640USB
Revision 1.1
Jun. 7, 1999
-7-
GL640USB, GL640USB-A
6
6
.
.
Block Diagram
This USB controller contains 3 sets of FIFO. The
ENDP0 FIFO
is an 8-byte FIFO to store/transmit the
endp0 control packet. The
FIFO0
and
FIFO1
are a set of 64-byte ping-pong FIFO for endp1 and endp2. FIFO0
is used for DATA0 packet and FIFO1 is for DATA1 packet. When they are served as the endp1 FIFO, the
LINKFF bit of FFCFG should be set and LINKDIR bit of FFCFG should be cleared. It they are allocated as the
endp1 FIFO, then LINKDIR should be set.
An EPP engine is included to automatically accessing data to/from external device ASIC. Firmware can set
the data length and hardware will count down to decide the last byte.
There are two sets of registers :
I/O register
and
USB register
. The
USB register
is controlled by
micro-controller to implement the USB endpoint 0 functions. The
I/O register
is the main register to interface the
data accessing between this controller and external device.
Micro Controller
I/O
Register
USB Control
Register
USB
SIE
ENDP0
FIFO
FIFO0
(64 bytes)
FIFO1
(64 bytes)
EPP
Engine
GL640USB
相關(guān)PDF資料
PDF描述
GL640USB-A Pin Strip Header; No. of Contacts:36; Pitch Spacing:0.1"; No. of Rows:1; Contact Material:Copper Alloy; Contact Plating:Gold; Leaded Process Compatible:Yes; Mounting Type:PCB Straight Thru Hole; Peak Reflow Compatible (260 C):No RoHS Compliant: Yes
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