
GL422/GL423 USB 2.0 +SD/MMC-controller Combo Solution
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 4
TABLE OF CONTENTS
CHAPTER 1 GENERAL DESCRIPTION.................................................7
1.1
USB
I
NTERFACE
......................................................................................8
1.2
CARD
I
NTERFACE
..................................................................................8
1.3
F
LASH
A
CCESS
I
NTERFACE
.....................................................................8
1.4
C
ONTROL
L
OGIC
.....................................................................................8
1.5
E
MBEDDED
CPU.....................................................................................8
CHAPTER 2 FEATURES...........................................................................9
2.1
USB
2.0
I
NTERFACE
................................................................................9
2.2
SD
H
OST
I
NTERFACE
..............................................................................9
2.3
MMC
H
OST
I
NTERFACE
.........................................................................9
2.4
F
LASH
M
EMORY
I
NTERFACE
................................................................ 10
2.5
M
ICRO
C
ONTROLLER AND
A
NALOG
S
YSTEM
........................................ 10
2.6
P
RODUCT
P
ACKAGES
............................................................................ 10
2.7
T
ECHNOLOGY
....................................................................................... 10
2.8
M
ANUFACTURE
..................................................................................... 10
CHAPTER 3 PIN ASSIGNMENT............................................................ 11
3.1
F
UNCTION DESCRIPTION
....................................................................... 11
3.1.1 USB specification compliance...................................................... 11
3.1.2 Integrated USB building blocks................................................... 11
3.1.3 Embedded 8051 micro-controller................................................ 11
3.1.4 3.3V power source ........................................................................ 11
3.1.5 Memory Stick TM interface......................................................... 11
3.1.6 Secure Digital (SD) and Multi Media Card (MMC)................... 11
3.1.7 High efficient hardware engine.................................................... 12
3.1.8 Inter-Media transfer capability................................................... 12
3.2
B
LOCK DIAGRAM
................................................................................... 12
3.2.1 UTM.............................................................................................. 12
3.2.2 SIE................................................................................................. 12
3.2.3 EPFIFO......................................................................................... 13
3.2.4 MHE.............................................................................................. 13