Specifications GAL16V8 13 tpd A Input or I/O to Comb. Output 3 10 3 15 3 20 3 25 ns
參數(shù)資料
型號: GAL16V8D-7LPN
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 7/26頁
文件大?。?/td> 0K
描述: IC PLD 8MACRO 5.0V 7.5NS 20PDIP
標準包裝: 18
系列: GAL®16V8
可編程類型: EE PLD
最大延遲時間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 4.75 V ~ 5.25 V
宏單元數(shù): 8
工作溫度: 0°C ~ 75°C
安裝類型: 通孔
封裝/外殼: 20-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 20-PDIP
包裝: 管件
Specifications GAL16V8
13
tpd
A
Input or I/O to Comb. Output
3
10
3
15
3
20
3
25
ns
tco
A
Clock to Output Delay
2
7
2
10
2
11
2
12
ns
tcf2
Clock to Feedback Delay
6
8
9
10
ns
tsu
Setup Time, Input or Fdbk before Clk↑
7.5
12
13
15
ns
th
Hold Time, Input or Fdbk after Clk↑
0
0—
0
ns
A
Maximum Clock Frequency with
66.7
45.5
41.6
37
MHz
External Feedback, 1/(tsu + tco)
fmax3
A
Maximum Clock Frequency with
71.4
50
45.4
40
MHz
Internal Feedback, 1/(tsu + tcf)
A
Maximum Clock Frequency with
83.3
62.5
50
41.6
MHz
No Feedback
twh
Clock Pulse Duration, High
6
8
10
12
ns
twl
Clock Pulse Duration, Low
6
8
10
12
ns
ten
B
Input or I/O to Output Enabled
1
10
15
18
20
ns
t
B
OE to Output Enabled
1
10
15
18
20
ns
tdis
C
Input or I/O to Output Disabled
1
10
15
18
20
ns
t
C
OE to Output Disabled
1
10
15
18
20
ns
AC Switching Characteristics
Over Recommended Operating Conditions
UNITS
-25
MIN.
MAX.
-20
MIN.
MAX.
-15
MIN.
MAX.
-10
MIN.
MAX.
PARAM.
DESCRIPTION
TEST
COND1.
COM / IND
IND
COM / IND
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
C
I
Input Capacitance
8
pF
V
CC = 5.0V, VI = 2.0V
C
I/O
I/O Capacitance
8
pF
V
CC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section. Characterized but not 100% tested.
Specifications GAL16V8D
Capacitance (T
A = 25°C, f = 1.0 MHz)
ALL
DEVICES
DISCONTINUED
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