Specifications GAL16V8 5 In the Registered mode, macrocells are configured as dedicated registered outputs or as I/O functions. Architecture co" />
參數(shù)資料
型號(hào)： GAL16V8D-5LJN
廠商： Lattice Semiconductor Corporation
文件頁(yè)數(shù)： 24/26頁(yè)
文件大?。?/td> 0K
描述： IC PLD 8MACRO 5.0V 5NS 20PLCC
標(biāo)準(zhǔn)包裝： 46
系列： GAL®16V8
可編程類型： EE PLD
最大延遲時(shí)間 tpd(1)： 5.0ns
電壓電源 - 內(nèi)部： 4.75 V ~ 5.25 V
宏單元數(shù)： 8
工作溫度： 0°C ~ 75°C
安裝類型： 表面貼裝
封裝/外殼： 20-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 20-PLCC（9x9）
包裝： 管件
Specifications GAL16V8
5
In the Registered mode, macrocells are configured as dedicated
registered outputs or as I/O functions.
Architecture configurations available in this mode are similar to the
common 16R8 and 16RP4 devices with various permutations of
polarity, I/O and register placement.
All registered macrocells share common clock and output enable
control pins. Any macrocell can be configured as registered or I/
O. Up to eight registers or up to eight I/O's are possible in this mode.
Dedicated input or output functions can be implemented as sub-
sets of the I/O function.
Registered outputs have eight product terms per output. I/O's have
seven product terms per output.
The JEDEC fuse numbers, including the User Electronic Signature
(UES) fuses and the Product Term Disable (PTD) fuses, are shown
on the logic diagram on the following page.
Registered Configuration for Registered Mode
- SYN=0.
- AC0=1.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this output configuration.
- Pin 1 controls common CLK for the registered outputs.
- Pin 11 controls common OE for the registered outputs.
- Pin 1 & Pin 11 are permanently configured as CLK &
OE for registered output configuration.
Combinatorial Configuration for Registered Mode
- SYN=0.
- AC0=1.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1 defines this output configuration.
- Pin 1 & Pin 11 are permanently configured as CLK &
OE for registered output configuration.
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
DQ
Q
CLK
OE
XOR
Registered Mode
ALL
DEVICES
DISCONTINUED
相關(guān)PDF資料
PDF描述
RBB120DHFN CONN EDGECARD 240POS .050 SMD
LC4064V-75T100E IC PLD 64MC 64I/O 7.5NS 100TQFP
GSC50DRTI CONN EDGECARD 100PS DIP .100 SLD
ASC05DRTH CONN EDGECARD 10POS .100 DIP SLD
LC4064ZC-5M132I IC PLD 64MC 64I/O 5NS 132CSBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GAL16V8D-7LD/833 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High Performance E2CMOS PLD Generic Array Logic
GAL16V8D-7LD/883 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD
GAL16V8D-7LJ 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5V 16 I/O RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
GAL16V8D-7LJAF6 制造商:Lattice Semiconductor Corporation 功能描述:
GAL16V8D-7LJI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 16 INPUT 8 OUTPUT 5V LOW POWER 7.5ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*