參數(shù)資料
型號: FXMA2102UMX
廠商: Fairchild Semiconductor
文件頁數(shù): 12/16頁
文件大?。?/td> 0K
描述: XLATOR/BUFF/REPEAT/ISOLATR 8UMLP
標(biāo)準(zhǔn)包裝: 1
邏輯功能: 變換器,雙向,3 態(tài),開路漏極
位數(shù): 2
輸入類型: 電壓
輸出類型: 電壓
通道數(shù): 2
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 4ns
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-UFQFN
供應(yīng)商設(shè)備封裝: 8-UMLP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: FXMA2102UMXDKR
2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXMA2102
Rev. 1.0.6
5
F
XM
A
2102
Dual
-S
upply
,
2
-Bit
Vol
tage
Tra
nsl
a
to
r/
Buf
fer
/
Repe
a
ter
/
Is
ola
to
rfor
I
2
C
Ap
plic
a
tions
Functional Description
Power-Up/Power-Down Sequencing
FXM translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0 V, outputs are in a
high-impedance
state.
The
control
input
(OE) is
designed to track the VCCA supply. A pull-down resistor
tying OE to GND should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the
pull-down resistor is based upon the current-sinking
capability of the device driving the OE pin.
The recommended power-up sequence is:
1. Apply power to the first VCC.
2. Apply power to the second VCC.
3. Drive the OE input HIGH to enable the device.
The recommended power-down sequence is:
1. Drive OE input LOW to disable the device.
2. Remove power from either VCC.
3. Remove power from other VCC.
Note:
4.
Alternatively, the OE pin can be hardwired to VCCA
to save GPIO pins. If OE is hardwired to VCCA,
either VCC can be powered up or down first.
Application Circuit
VCCA
VCCB
A0
A1
OE
B0
B1
GND
1
4
3
5
2
6
7
8
RPU
CBP
RPD
VCCA
VCCB
Figure 4. Application Circuit
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