參數(shù)資料
型號(hào): FXLA101L6X
廠商: Fairchild Semiconductor
文件頁數(shù): 9/18頁
文件大?。?/td> 0K
描述: XLATOR 1BIT DUAL 6-MICROPAK
標(biāo)準(zhǔn)包裝: 5,000
邏輯功能: 變換器,雙向,3 態(tài)
位數(shù): 1
輸入類型: 電壓
輸出類型: 電壓
數(shù)據(jù)速率: 140Mbps
通道數(shù): 1
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 4ns
電源電壓: 1.1 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 6-UFDFN
供應(yīng)商設(shè)備封裝: 6-MicroPak
包裝: 帶卷 (TR)
2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FLXA101 Rev. 1.0.4
17
FLXA101
Low-Voltage
Dual-Supply
1-Bit
Voltage
Translator
wi
th
Auto
Detection
Sensing
Physical Dimensions
Figure 12.6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specification
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf.
Package Designator
Tape Section
Cavity Number
Cavity Status
Cover Type Status
FHX
Leader (Start End)
125 (Typical)
Empty
Sealed
Carrier
5000
Filled
Sealed
Trailer (Hub End)
75 (Typical)
Empty
Sealed
1.00
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994
NOTES:
A. COMPLIES TO JEDEC MO-252 STANDARD
0.05 C
A
B
0.55MAX
0.05 C
C
0.35
0.09
0.19
12
3
0.35
0.25
5X
6X
DETAIL A
0.60
(0.08)
4X
(0.05) 6X
0.40
0.30
0.075X45°
CHAMFER
5X 0.40
0.35
1X 0.45
6X 0.19
TOP VIEW
BOTTOM VIEW
0.66
0.10
CB A
.05 C
0.89
PIN 1
0.05 C
2X
1.00
D. LANDPATTERN RECOMMENDATION IS BASED ON FSC
E. DRAWING FILENAME AND REVISION: MGF06AREV3
0.52
0.73
0.57
0.20 6X
1X
5X
RECOMMENDED LAND PATTERN
FOR SPACE CONSTRAINED PCB
DETAIL A
PIN 1 LEAD SCALE: 2X
ALTERNATIVE LAND PATTERN
FOR UNIVERSAL APPLICATION
DESIGN.
0.90
MIN 250uM
6
54
0.35
(0.08) 4X
SIDE VIEW
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