參數(shù)資料
型號: FXL4245MPX
廠商: Fairchild Semiconductor
文件頁數(shù): 11/11頁
文件大?。?/td> 0K
描述: TRANSLATOR 8BIT DUAL 24MLP
產品培訓模塊: Logic Translator Solutions
標準包裝: 1
邏輯功能: 變換器,雙向,3 態(tài)
位數(shù): 8
輸入類型: 電壓
輸出類型: 電壓
通道數(shù): 1
輸出/通道數(shù)目: 8
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 3.5ns
電源電壓: 1.1 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 24-WFQFN 裸露焊盤
供應商設備封裝: 24-MLP(3.5x4.5)
包裝: 標準包裝
產品目錄頁面: 1220 (CN2011-ZH PDF)
其它名稱: FXL4245MPXDKR
2004 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL4245 Rev. 1.0.3
9
FXL4245
Low-Voltage,
Dual-Suppl
y,
8-Bit,
Signal
Translator
Functional Description
Power-Up/Power-Down Sequencing
FXL translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0V, outputs are in a
High-impedance state. The control inputs (T/R and OE)
are designed to track the VCCA supply. A pull-up resistor
tying OE to VCCA should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the
pull-up resistor is based upon the current-sinking
capability of the OE driver.
The recommended power-up sequence is:
1.
Apply power to either VCC.
2.
Apply power to the T/R input (logic HIGH for A-to-B
operation; logic LOW for B-to-A operation) and to
the respective data inputs (A port or B port). This
may occur at the same time as step 1.
3.
Apply power to the other VCC.
4.
Drive the OE input LOW to enable the device.
The recommended power-down sequence is:
1.
Drive OE input HIGH to disable the device.
2.
Remove power from either VCC.
3.
Remove power from the other VCC.
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