參數(shù)資料
型號： FX818
元件分類： Codec
英文描述： CTCSS Super Codec
中文描述： 超級亞音頻編解碼器
文件頁數(shù)： 25/26頁
文件大?。?/td> 676K
代理商： FX818
CTCSS Signalling Processor
FX818
1997
Consumer Microcircuits Limited
25
D/818/4
1.7.1
Electrical Performance
(continued)
Timing Diagrams
Figure 4 "C-BUS" Timing
For the following conditions unless otherwise specified:
Xtal Frequency = 4.032MHz, V
DD
= 3.3V to 5.0V, Tamb = -40°C to +85°C.
Parameter
Notes
Min.
Typ.
Max.
Units
t
CSE
t
CSH
t
HIZ
t
CSOFF
t
NXT
t
CK
"CS-Enable to Clock-High"
2.0
-
μs
Last "Clock-High to CS-High"
4.0
-
μs
"CS-High to Reply Output 3-state"
-
2.0
μs
"CS-High" Time between transactions
2.0
-
μs
"Inter-Byte" Time
4.0
-
μs
"Clock-Cycle" time
2.0
-
μs
Notes:
1.
Depending on the command, 1 or 2 bytes of COMMAND DATA are transmitted to the peripheral
MSB (Bit 7) first, LSB (Bit 0) last. REPLY DATA is read from the peripheral MSB (Bit 7) first, LSB
(Bit 0) last.
Data is clocked into and out of the peripheral on the rising SERIAL CLOCK edge.
Loaded commands are acted upon at the end of each command.
To allow for differing μController serial interface formats "C-BUS" compatible ICs are able to work
with either polarity SERIAL CLOCK pulses.
2.
3.
4.
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