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參數(shù)資料
| 型號： | FW114 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | S/W Load Applications |
| 中文描述： | 的S / W負荷應用 |
| 文件頁數(shù)： | 3/3頁 |
| 文件大小： | 47K |
| 代理商： | FW114 |
FW114
PS No.5848-3/3
No products described or contained herein are intended for use in surgical implants, life-support systems,
aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and
the like, the failure of which may directly or indirectly cause injury, death or property loss.
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates,
subsidiaries and distributors and all their officers and employees, jointly and severally, against any
and all claims and litigation and all damages, cost and expenses associated with such use:
Not impose any responsibilty for any fault or negligence which may be cited in any such claim or
litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of
their officers and employees jointly or severally.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant-
eed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees
are made or implied regarding its use or any infringements of intellectual property rights or other rights of
third parties.
This catalog provides information as of May, 1998. Specifications and information herein are subject to
change without notice.
Ciss,Coss,Crss
-
V
DS
V
GS
-
Qg
f=1MHz
Ciss
Crss
Coss
V
DS
=–10V
I
D
=–3A
C
10
2
3
5
7
100
2
3
5
7
1000
2
3
5
7
10000
0
-4
Drain-to-Source Voltage,V
DS
– V
SW Time
-
-2
-6
-8
-10
-14
-12
-16
-18
-20
0
-1
-2
-3
-4
-5
-10
-9
-8
-7
-6
0
2
4
6
8
10
12
14
24
16
18
20
22
G
G
Total Gate Charge, Qg – nC
A S O
1unt
Mountes in ceramic board(1200mm
2
×
0.8mm)
20
40
60
Mounted on ceramic board (1200mm
2
×
0.8mm)
2
3
5
7
-0.01
-0.1
2
Mounedonceamcboad(1200mm
×
08mm
2
S
Drain Current, I
D
– A
D
D
A
D
(
Allowable Dissipation, P
D
(FET1) – W
A
D
Ambient Temperature, Ta – C
Drain -to-Source Voltage, V
DS
- V
V
DD
=–10V
V
GS
=–4V
tr
tf
tdof
td(on)
1m
10ms
100ms
100
μ
s
10
μ
s
I
DP
=–32A
I
D
=–3A
Operation in this area is
limited by R
DS
(on).
Ta=25C
1pulse
1unit
0
0.2
0.2
0.4
0.6
0.8
1.0
2.0
1.6
1.8
1.4
1.2
0
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
I
D
P
D
(FET2)
-
P
D
(FET1)
P
D
-
Ta
0
0.5
1.0
2.5
2.0
1.7
1.5
0
80
100
120
140
160
2
3
5
7
-0.1
1.0
10
2
3
5
7
100
2
3
5
7
1000
2
3
5
7
7
-1.0
2
3
5
7
-10
2
3
5
7
-0.01
-0.1
3
5 7
2 3
5
2
3
7
-1.0
-10
2
3
5
7
-1.0
2
3
5
7
2
3
5
7
-10
-100
DCopeaion
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