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參數(shù)資料
| 型號： | FTRJ8519U1GNL |
| 元件分類： | 光收發(fā) |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 830-860nm, 2125Mbps(Tx), 2125Mbps(Rx), THROUGH HOLE MOUNT, LC CONNECTOR |
| 文件頁數(shù)： | 15/15頁 |
| 文件大?。?/td> | 356K |
| 代理商： | FTRJ8519U1GNL |
FTRJ8519U1xNL 2x6 Pin SFF Product Specification – March 2005
Finisar Corporation March 23, 2005 Rev D
Page 9
analog input
108
All
Reserved MSB
Reserved for 2
nd future definition of digitized
analog input
109
All
Reserved LSB
Reserved for 2
nd future definition of digitized
analog input
110
7
TX Disable State
Digital state of the TX Disable Input Pin.
Updated within 100msec of change on pin.
110
6
Soft TX Disable
Read/write bit that allows software disable of
laser. Writing ‘1’ disables laser. Turn on/off
time is 100 msec max from acknowledgement
of serial byte transmission. This bit is “OR”d
with the hard TX_DISABLE pin value. Note,
per SFP MSA TX_DISABLE pin is default
enabled unless pulled low by hardware. If Soft
TX Disable is not implemented, the transceiver
ignores the value of this bit. Default power up
value is 0.
110
5
Reserved
110
4
RX Rate Select State
Digital state of the SFP RX Rate Select Input
Pin. Updated within 100msec of change on
pin.
110
3
Soft RX Rate Select
Read/write bit that allows software RX rate
select.
Writing ‘1’ selects full bandwidth
operation. This bit is “OR’d with the hard RX
RATE_SELECT pin value. Enable/disable time
is 100msec max from acknowledgement of
serial byte transmission. Soft RX rate select
does
not
meet
the
autonegotiation
requirements specified in FC-FS. Default at
power up is zero. If Soft RX Rate Select is not
implemented, the transceiver ignores the value
of this bit.
110
2
TX Fault
Digital state of the TX Fault Output Pin.
Updated within 100msec of change on pin.
110
1
SD (Signal Detect)
Digital state of the Signal Detect (SD) Pin.
Updated within 100msec of change on pin.
110
0
Data_Ready_Bar
Indicates transceiver has achieved power up
and data is ready. Bit remains high until data is
ready to be read at which time the device sets
the bit low.
111
7-0
Reserved
Reserved.
ALARM AND WARNING FLAG BITS
112
7
Temp High Alarm
Set when internal temperature exceeds high
alarm level.
112
6
Temp Low Alarm
Set when internal temperature is below low
alarm level.
112
5
Vcc High Alarm
Set when internal supply voltage exceeds high
alarm level.
112
4
Vcc Low Alarm
Set when internal supply voltage is below low
alarm level.
112
3
TX Bias High Alarm
Set when TX Bias current exceeds high alarm
level.
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