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參數(shù)資料
| 型號(hào)： | FTLX3812M323 |
| 元件分類： | 光收發(fā) |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 11100Mbps(Tx), 11100Mbps(Rx), SURFACE MOUNT, LC CONNECTOR |
| 封裝： | ROHS COMPLIANT PACKAGE |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 193K |
| 代理商： | FTLX3812M323 |
FTLX3812M3xx Amplified DWDM XFP Product Specification – January 2011
F i n i s a r
Finisar Corporation 11-January-2011
Rev C1
Page 3
I.
Pin Descriptions
Pin
Logic
Symbol
Name/Description
Ref.
1
GND
Module Ground
1
2
VEE5
Optional –5.2 Power Supply – Not required
3
LVTTL-I
Mod-Desel
Module De-select; When held low allows the module to
respond to 2-wire serial interface commands
4
LVTTL-O
Interrupt
Interrupt (bar); Indicates presence of an important condition
which can be read over the serial 2-wire interface
2
5
LVTTL-I
TX_DIS
Transmitter Disable; Transmitter laser source turned off
6
VCC5
+5 Power Supply
7
GND
Module Ground
1
8
VCC3
+3.3V Power Supply
9
VCC3
+3.3V Power Supply
10
LVTTL-I
SCL
Serial 2-wire interface clock
2
11
LVTTL-
I/O
SDA
Serial 2-wire interface data line
2
12
LVTTL-O
Mod_Abs
Module Absent; Indicates module is not present. Grounded
in the module.
2
13
LVTTL-O
Mod_NR
Module Not Ready; Finisar defines it as a logical OR
between RX_LOS and Loss of Lock in TX/RX.
2
14
LVTTL-O
RX_LOS
Receiver Loss of Signal indicator
2
15
GND
Module Ground
1
16
GND
Module Ground
1
17
CML-O
RD-
Receiver inverted data output
18
CML-O
RD+
Receiver non-inverted data output
19
GND
Module Ground
1
20
VCC2
+1.8V Power Supply
21
LVTTL-I
P_Down/RST
Power Down; When high, places the module in the low
power stand-by mode and on the falling edge of P_Down
initiates a module reset
Reset; The falling edge initiates a complete reset of the
module including the 2-wire serial interface, equivalent to a
power cycle.
22
VCC2
+1.8V Power Supply
23
GND
Module Ground
1
24
PECL-I
RefCLK+
Reference Clock non-inverted input, AC coupled on the
host board – Not required
25
PECL-I
RefCLK-
Reference Clock inverted input, AC coupled on the host
board – Not required
26
GND
Module Ground
1
27
GND
Module Ground
1
28
CML-I
TD-
Transmitter inverted data input
29
CML-I
TD+
Transmitter non-inverted data input
30
GND
Module Ground
1
Notes:
1.
Module circuit ground is isolated from module chassis ground within the module.
2.
Open collector; should be pulled up with 4.7k – 10kohms on host board to a voltage between 3.15V
and 3.6V.
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| FTLX3812M324 | 制造商:FINISAR 制造商全稱:FINISAR 功能描述:Multiprotocol 10Gb/s DWDM XFP Optical Transceiver |
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| FTLX3812M326 | 制造商:FINISAR 制造商全稱:FINISAR 功能描述:Multiprotocol 10Gb/s DWDM XFP Optical Transceiver |
| FTLX3812M327 | 制造商:FINISAR 制造商全稱:FINISAR 功能描述:Multiprotocol 10Gb/s DWDM XFP Optical Transceiver |
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