參數(shù)資料
型號(hào): FTLX1471D3BCV
元件分類: 光收發(fā)
英文描述: FIBER OPTIC TRANSCEIVER, 1260-1355nm, 10300Mbps(Tx), 10300Mbps(Rx), PANEL MOUNT, LC CONNECTOR
封裝: ROHS COMPLIANT PACKAGE-20
文件頁(yè)數(shù): 6/13頁(yè)
文件大小: 639K
代理商: FTLX1471D3BCV
FTLX1471D3BCV Datacom SFP+ Product Specification – September 2009
Finisar Corporation - September 2009
Rev. B
Page 2
I.
Pin Descriptions
Pin
Symbol
Name/Description
Ref.
1
VEET
Transmitter Ground
1
2
TFAULT
Transmitter Fault
2
3
TDIS
Transmitter Disable. Laser output disabled on high or open.
3
4
SDA
2-wire Serial Interface Data Line
4
5
SCL
2-wire Serial Interface Clock Line
4
6
MOD_ABS
Module Absent. Grounded within the module
4
7
RS0
RS0 for Rate Select: Open or Low = Module supports 1.25 Gb/s
High = Module supports 9.95 Gb/s to 10.3125 Gb/s
5
8
RX_LOS
Loss of Signal indication. Logic 0 indicates normal operation.
6
9
RS1
No connection required
10
VEER
Receiver Ground
1
11
VEER
Receiver Ground
1
12
RD-
Receiver Inverted DATA out. AC Coupled.
13
RD+
Receiver Non-inverted DATA out. AC Coupled.
14
VEER
Receiver Ground
1
15
VCCR
Receiver Power Supply
16
VCCT
Transmitter Power Supply
17
VEET
Transmitter Ground
1
18
TD+
Transmitter Non-Inverted DATA in. AC Coupled.
19
TD-
Transmitter Inverted DATA in. AC Coupled.
20
VEET
Transmitter Ground
1
Notes:
1.
Circuit ground is internally isolated from chassis ground.
2.
T
FAULT
is an open collector/drain output, which should be pulled up with a 4.7k – 10k Ohms resistor on the host board if
intended for use. Pull up voltage should be between 2.0V to Vcc + 0.3V. A high output indicates a transmitter fault caused
by either the TX bias current or the TX output power exceeding the preset alarm thresholds. A low output indicates normal
operation. In the low state, the output is pulled to <0.8V.
3.
Laser output disabled on TDIS >2.0V or open, enabled on TDIS <0.8V.
4.
Internally pulled down per SFF-8431 Rev 3.0.
5.
Transceiver data rate selected through the 2-wire bus in accordance with SFF-8472 Rev. 10.3. Soft RS0 is set at Bit3,
Byte 110, Address A2h. Soft RS0 default state on power up is ‘0’ LOW, and the state is reset following a power cycle.
Writing ‘1’ HIGH selects max. data rate operation. Transceiver data rate is the logic OR of the input state of the RS0 pin
and soft RS0 bit. Thus, if either the RS0 pin OR the soft RS0 bit is HIGH then the selected data rate will be 9.95 and 10.3
Gb/s. Conversely, to select data rate 1.25 Gb/s both the RS0 pin and the soft RS0 bit are set LOW.
6.
LOS is open collector output. Should be pulled up with 4.7k – 10k
Ω on host board to a voltage between 2.0V and 3.6V.
Logic 0 indicates normal operation; logic 1 indicates loss of signal.
Figure 1. Diagram of Host Board Connector Block Pin Numbers and Names.
VeeT
VeeR
TD-
TD+
RD+
RD-
VccT
VccR
VeeT
VeeR
TX_Fault
SDA
SCL
MOD_ABS
RS0
RX_LOS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Towards
ASIC
Towards
Bezel
TX_Disable
RS1
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