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參數(shù)資料
| 型號： | FSUSB63UMX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC USB 2.0 SW & MUX 3:1 12-UMLP |
| 標準包裝： | 5,000 |
| 功能： | USB 開關 |
| 電路： | 3:1 |
| 導通狀態(tài)電阻： | 6 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 4.4 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-UFQFN |
| 供應商設備封裝： | 12-UMLP（1.8x1.8） |
| 包裝： | 帶卷 (TR) |
Micrel, Inc.
SY87724L
March 2008
7
M9999-032608-B
hbwhelp@micrel.com or (408) 955-1690
Description
General
The SY87724L MDM is designed to perform muxing and
demuxing at up to 2.7GHz speeds. The device can
simultaneously MUX and demux up to 10 bits of full duplex
data. In addition, a full parallel-to-parallel loopback function
is implemented, such that parallel data out will loop back to
parallel data in, with the device internally connecting the
serial output to the serial input.
Narrow DeMUX
In this example, serial data is converted into 4 or 5 bit wide
data. Because this can result in very high data rates on the
parallel outputs, they are differential. The DFMIN± input
indicates, synchronously with DCKIN±, and one clock
ahead, the start of a 4 or 5 bit boundary.
Figure 1. Narrow DeMUX
Every DFMIN± assertion will trigger a new 4 or 5 bit
boundary. Should only one DFMIN± assertion occur, then
DPOUTCK± will continue to assert every 4 or 5 DCKIN±
clocks. Should a subsequent DFMIN± assertion reset the 4
or 5 bit boundary, then DPOUTCK± will always result in a
longer assertion, not a shorter one.
For example, if a subsequent DFMIN± resets a 5 bit
boundary after the second bit in relation to a previous
boundary, then the next DPOUTCK± will always occur 7
DCKIN± later, never 2 DCKIN± later. For four bit output,
DP5± are not used.
Wide DeMUX
The more typical case will be to convert the serial data
stream into 8 or 10 bit wide data. Because the worst case
parallel transfer rate is on the order of 250 to 340 Mega-
transfers per second, single ended parallel output is
preferred. Thus, only the single-ended side of the
differential outputs is used.
This example is much like the narrow demux, except now
DFMIN± indicates 8 or 10 bit boundaries.
Figure 2. Wide DeMUX
As in the narrow case, DPOUTCK± will never assert twice
in 8 or 10 DCKIN± cycles. Should a DFMIN± assertion
change the MDM’s 8 or 10 bit boundary, DPOUTCK±
assertion will be delayed and there will never be a short
assertion.
For 8 bit output, DP4± and DP9 are not used.
The following table summarizes the available bit widths.
The right column shows the parallel bits, in sequence from
first in serially, to last in.
Width
Sequence
4
DP0±, DP1±, DP2±, DP3±
5
DP0±, DP1±, DP2±, DP3±, DP4±
8
DP0+, DP1+, DP2+, DP3+, DP5, DP6, DP7, DP8
10
DP0+, DP1+, DP2+, DP3+, DP4+, DP5, DP6, DP7,
DP8, DP9
Table 3. Output Pins for Different Width DeMUX
Narrow MUX
In this scenario, 4 or 5 bit wide parallel data is converted to
a serial bit stream. Because this can result in very high
data rates on the parallel inputs, they are differential. In
this
mode
of
operation,
there
is
no
external
synchronization, and the MPINCK± signal pair has
arbitrary phase with respect to the MTXCLK± clock, which
clocks the MUX output shift register.
Figure 3. Narrow MUX
MPINCK± indicates when MDM is ready to accept more
data. It is derived from MTXCLK±, with an arbitrary phase
relationship.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FSUSB63UMX_F106 | 功能描述:電源開關 IC - USB Hi-Speed USB2 SW/MUX RoHS:否 制造商:Micrel 電源電壓-最小:2.7 V 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-8 封裝:Tube |
| FSUSB73 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:3:1 High-Speed USB Multiplexer and Hub Routing Switch |
| FSUSB73UMX | 功能描述:電源開關 IC - USB Hi-Speed USB2 SW/MUX RoHS:否 制造商:Micrel 電源電壓-最小:2.7 V 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-8 封裝:Tube |
| FSUSB74 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:4:1 High-Speed USB Multiplexer/Switch |
| FSUSB74MPX | 功能描述:電源開關 IC - USB Hi-Speed USB2 SW/MUX RoHS:否 制造商:Micrel 電源電壓-最小:2.7 V 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-8 封裝:Tube |
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