
2000 Fairchild Semiconductor International
September 2000
Rev. A, September 2000
F
QFET
TM
FQD7P06 / FQU7P06
60V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as automotive, DC/
DC converters, and high efficiency switching for power
management in portable and battery operated products.
Features
-5.4A, -60V, R
DS(on)
= 0.45
@V
GS
= -10 V
Low gate charge ( typical 6.3 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings
T
C
= 25°C unless otherwise noted
Thermal Characteristics
Symbol
V
DSS
I
D
Parameter
FQD7P06 / FQU7P06
-60
-5.4
-3.42
-21.6
±
25
90
-5.4
2.8
-7.0
2.5
28
0.22
-55 to +150
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
Drain-Source Voltage
Drain Current
- Continuous (T
C
= 25°C)
- Continuous (T
C
= 100°C)
- Pulsed
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
Drain Current
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25°C) *
Power Dissipation (T
C
= 25°C)
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
- Derate above 25°C
T
J
, T
STG
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
T
L
300
°C
Symbol
R
θ
JC
R
θ
JA
R
θ
JA
Parameter
Typ
--
--
--
Max
4.5
50
110
Units
°C
/
W
°C
/
W
°C
/
W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
I-PAK
FQU Series
D-PAK
FQD Series
G
S
D
G
S
D
●
●
●
●
▲
!
!
D
!
!
!
●
●
S
G