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參數(shù)資料
| 型號： | FMS7401LEN |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Digital Power Controller |
| 中文描述： | 8-BIT, EEPROM, 2.04 MHz, MICROCONTROLLER, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁數(shù)： | 13/80頁 |
| 文件大?。?/td> | 1535K |
| 代理商： | FMS7401LEN |
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PRODUCT SPECIFICATION
FMS7401/7401L
REV. 1.0.2 6/23/04
13
3
Power Saving Modes
The FMS7401/7401L has both Halt and Idle power saving modes. Each mode is controlled by software and offers the advan-
tage of reducing the total current consumption of the device in an application. For all current consumption details, please refer
to the
Electrical Characteristics
section of the datasheet. In order to maintain proper Vcc voltage regulation of the FMS7401,
the internal regulator remains enabled—making the current consumption much higher than the FMS7401L for both Halt and
Idle Modes.
1
3.1
Halt Mode is a power saving feature that almost completely shuts down the device for current conservation. The device is
placed into Halt Mode by setting the Halt enable bit (EHALT) of the HALT register using either the “LD M, #” or the “SBIT #,
M” instructions in the software. EHALT is a write only bit and is automatically cleared upon exiting Halt Mode. When enter-
ing Halt Mode, the internal oscillator and all other on-chip systems including the Programmable Comparator (COMP) and
Brown-out Reset (BOR) circuits are shut down. For the FMS7401, to maintain proper Vcc voltage regulation, the internal reg-
ulator circuit remains enabled while in Halt Mode.
Halt Mode
The device can exit Halt Mode only by the Multi-input Wakeup (MIW) circuit.
2
Therefore, prior to entering Halt Mode, soft-
ware must first configure the MIW circuit. After a wakeup from Halt Mode, a T
HALT_REC
3
start-up delay is initiated to allow the
internal oscillator and other analog circuits to stabilize before normal device execution resumes. Immediately after exiting Halt
Mode, software must clear the Power Mode Clear (PMC) register by using only the “LD M, #” instruction (see
Figure 5
).
Table 4.
HALT Register Definition
Figure 5. Recommended Halt/Idle Flow
3.1.1 PLL Steps for Halt Mode
When using Halt Mode and the PLL in an application, software must take the appropriate steps in order to keep the integrity of
the clock structure before entering and after exiting Halt since the PLL must be disabled. While in Halt Mode, all other device
circuits except for the MIW are disabled. Once the PLL is disabled, all output frequencies are turned off. If the PLL is re-
HALT Register (addr. 0xB7)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
EIDLE
EHALT
Normal Mode
Halt Mode
Resume Normal
Mode
LD HALT, #01H
LD PMC, #00H
Multi-Input
Wakeup
Normal Mode
Idle Mode
Resume Normal
Mode
LD PMC, #00H
Timer 0
Overflow
Multi-Input
Wakeup
LD HALT, #02H
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PDF描述 |
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| FMS7401LEN14 | Digital Power Controller |
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| FMS7401LVN14 | Digital Power Controller |
| FMS7G10US60S | SWTCH ROLLER SPDT 20A SCRW TERM |
| FMS7G10US60 | SWTCH ROLLER SPDT 20A SOLD TERM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FMS7401LEN14 | 功能描述:處理器 - 專門應(yīng)用 Int Controller for Ballast RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| FMS7401LEN14_Q | 功能描述:處理器 - 專門應(yīng)用 Int Controller for Ballast RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| FMS7401LVN | 功能描述:處理器 - 專門應(yīng)用 Int Controller for Ballast RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| FMS7401LVN14 | 功能描述:8位微控制器 -MCU Int Controller for Ballast RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| FMS7401LVN14_Q | 功能描述:8位微控制器 -MCU Int Controller for Ballast RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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