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參數(shù)資料
| 型號(hào)： | FMS72509MTC |
| 英文描述： | Ten Distributed-Output Clock Driver |
| 中文描述： | 十分布式輸出時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 46K |
| 代理商： | FMS72509MTC |
PRODUCT SPECIFICATION
FMS72509
2
REV. 1.0 8/11/00
Pin Assignments
Pin Description
Functionality Table
NOTES:
1. Depending on the state of the CLKIN, it will be High or Low.
2. Lock in phase with CLKIN.
Pin Name
GND
Pin #
Pin Type
PWR
Pin Function Description
Connect all ground pins to the common system
6, 7, 18, 19
Ground Connection:
ground plane.
Analog Ground Connection:
Power Connection:
Power Connection:
bypass the PLL.
Clock outputs:
Outputs Enable 1:
Q4 are to logic low. Normal operation when asserted high.
Feedback Clock Output:
Dedicated pin for FB pin. It is not effected by OE pin.
Feedback Clock Input:
PLL feedback input. The user connects it to
FBOUT.
Outputs Enable 2:
When low, outputs 5:8 are logic low. Normal operation
when asserted high. This function is only for FMS72509.
Power Connection:
Power supply for PLL. Connect to 3.3V.
Clock outputs:
Outputs are buffer clocks of input.
Input Clock:
Input clock to the PLL.
AGND
V
DD
AV
1
PWR
PWR
PWR
Connect to common system ground plane.
Power supply for all the outputs.
Power supply for the PLL. In addition, it can be used to
2, 10, 15, 22
23
DD
Q(0:4)
OE1
3, 4, 5, 8, 9
11
OUT
IN
Clock outputs 0:4 are buffer clocks of input.
When low, outputs, with the exception of FBOUT, Q0 to
FBOUT
FBIN
12
13
OUT
IN
OE2
14
IN
V
DD
15
PWR
OUT
IN
Q(5:8)
CLKIN
16,17, 20, 21
24
AVDD
L
L
L
H
H
H
OE1
L
L
H
L
L
H
OE2
L
H
L
L
H
H
PLL
Q(0:4)
L
L
X
L
L
Note 2
Q(5:8)
L
X
L
L
Note 2
Note 2
FBOUT
X
X
X
Note 2
Note 2
Note 2
BYPASS
BYPASS
BYPASS
Enabled
Enabled
Enabled
(1)
(1)
(1)
(1)
(1)
AGND
V
DD
Q0
FBOUT
FMS72509
24 TSSOP
1
3
4
5
6
7
8
9
10
11
12
2
17
16
15
14
13
18
19
20
21
22
23
24
Q1
Q2
GND
GND
Q3
Q4
V
DD
OE1
FBIN
OE2
V
DD
Q5
Q6
Q8
Q7
GND
GND
V
DD
AV
DD
CLKIN
相關(guān)PDF資料 |
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| FMS7857MTD | Ten Distributed-Output Clock Driver |
| FMS7857MTDT | Ten Distributed-Output Clock Driver |
| FMS7950KWC | Miscellaneous Clock Generator |
| FMS7950KWCX | Miscellaneous Clock Generator |
| FMS7951KWC | Nine Distributed-Output Clock Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FMS72510MTC | 功能描述:鎖相環(huán) - PLL TSSOP-24 RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| FMS72510MTCT | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| FMS7401 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Power Controller |
| FMS7401L | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Power Controller |
| FMS7401L_05 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Power Controller |
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