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參數(shù)資料
| 型號： | FMS6346MTC20 |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 6/7頁 |
| 文件大小： | 0K |
| 描述： | IC FILTER LCVF 6CH SD/HD 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 73 |
| 類型： | 驅(qū)動器 |
| 應(yīng)用： | 錄音機(jī)，機(jī)頂盒 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
1983 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HC86 Rev. 1.4.0
6
MM74HC86
—
Quad
2-Input
Exclusive
OR
Gate
Physical Dimensions
Figure 3.
14-Lead, Thin-Shrink Small-Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS
F. DRAWING FILE NAME: MTC14REV6
R0.09 min
12.00°
TOP & BOTTOM
0.43 TYP
1.00
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 1982
R0.09min
E. LANDPATTERN STANDARD: SOP65P640X110-14M
0.65
6.10
1.65
0.45
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS
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